code.ossystems Code Review - meta-freescale.git/blob

   1 From 2099c301274b8273e9cf68fc76dd03225681b5df Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
   3 Date: Tue, 21 Feb 2012 01:06:51 +0100
   4 Subject: [PATCH 4/7] i.MX53: enable pull up on I2C0 pins
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 this allows I2C to work on boards which don't have external pull up
  10 (like LOCO board)
  11
  12 Signed-off-by: Eric Bénard <eric@eukrea.com>
  13 ---
  14 Upstream-Status: Applied for 2012.04.0
  15
  16  arch/arm/mach-imx/include/mach/iomux-mx53.h |    8 +++++---
  17  1 files changed, 5 insertions(+), 3 deletions(-)
  18
  19 diff --git a/arch/arm/mach-imx/include/mach/iomux-mx53.h b/arch/arm/mach-imx/include/mach/iomux-mx53.h
  20 index 527f8fe..ac94deb 100644
  21 --- a/arch/arm/mach-imx/include/mach/iomux-mx53.h
  22 +++ b/arch/arm/mach-imx/include/mach/iomux-mx53.h
  23 @@ -30,7 +30,9 @@
  24  #define MX53_SDHC_PAD_CTRL     (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
  25                                 PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \
  26                                 PAD_CTL_SRE_FAST)
  27 -
  28 +#define MX53_I2C_PAD_CTRL      (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
  29 +                               PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH | \
  30 +                               PAD_CTL_SRE_FAST)
  31
  32  #define MX53_PAD_GPIO_19__KPP_COL_5                    IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL)
  33  #define MX53_PAD_GPIO_19__GPIO4_5                      IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL)
  34 @@ -377,7 +379,7 @@
  35  #define MX53_PAD_CSI0_DAT8__KPP_COL_7                  IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL)
  36  #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK                        IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL)
  37  #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC            IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL)
  38 -#define MX53_PAD_CSI0_DAT8__I2C1_SDA                   IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PAD_CTRL)
  39 +#define MX53_PAD_CSI0_DAT8__I2C1_SDA                   IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, MX53_I2C_PAD_CTRL)
  40  #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37           IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL)
  41  #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5               IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL)
  42  #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9               IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL)
  43 @@ -385,7 +387,7 @@
  44  #define MX53_PAD_CSI0_DAT9__KPP_ROW_7                  IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL)
  45  #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI                        IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL)
  46  #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR           IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL)
  47 -#define MX53_PAD_CSI0_DAT9__I2C1_SCL                   IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PAD_CTRL)
  48 +#define MX53_PAD_CSI0_DAT9__I2C1_SCL                   IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, MX53_I2C_PAD_CTRL)
  49  #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38           IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL)
  50  #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6               IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL)
  51  #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10             IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL)
  52 --
  53 1.7.7.6
  54