code.ossystems Code Review - meta-freescale.git/blob

   1 From 3082ee40d024412e8c275f1945e4a06a638e81bb Mon Sep 17 00:00:00 2001
   2 From: Robin Gong <b38343@freescale.com>
   3 Date: Thu, 6 Mar 2014 19:36:02 +0800
   4 Subject: [PATCH 09/10] ENGR00301078-2: ARM: dts: imx6sl-evk: add support for
   5  pfuze200 on imx6sl-evk
   6 Organization: O.S. Systems Software LTDA.
   7
   8 move pmic device node from imx6sl-evk.dtsi to upper-level, and add
   9 another layer on imx6sl-evk to diff pfuze100 or pfuze200. Meanwhile
  10 only works in ldo-enable mode if using pfuze200, since 'SW1C' switch
  11 regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have
  12 to share the same switch regulator
  13
  14 Signed-off-by: Robin Gong <b38343@freescale.com>
  15
  16 Upstream-Status: Pending
  17 ---
  18  arch/arm/boot/dts/Makefile               |   1 +
  19  arch/arm/boot/dts/imx6sl-evk-common.dtsi | 504 +++++++++++++++++++++++++++++++
  20  arch/arm/boot/dts/imx6sl-evk-pf200.dts   | 122 ++++++++
  21  arch/arm/boot/dts/imx6sl-evk.dts         | 497 +-----------------------------
  22  4 files changed, 630 insertions(+), 494 deletions(-)
  23  create mode 100644 arch/arm/boot/dts/imx6sl-evk-common.dtsi
  24  create mode 100644 arch/arm/boot/dts/imx6sl-evk-pf200.dts
  25
  26 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
  27 index c744cda..c5f9a19 100644
  28 --- a/arch/arm/boot/dts/Makefile
  29 +++ b/arch/arm/boot/dts/Makefile
  30 @@ -135,6 +135,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
  31         imx6sl-evk.dtb \
  32         imx6sl-evk-csi.dtb \
  33         imx6sl-evk-ldo.dtb \
  34 +       imx6sl-evk-pf200.dtb \
  35         vf610-twr.dtb
  36  dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
  37         imx23-olinuxino.dtb \
  38 diff --git a/arch/arm/boot/dts/imx6sl-evk-common.dtsi b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
  39 new file mode 100644
  40 index 0000000..a1a3969
  41 --- /dev/null
  42 +++ b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
  43 @@ -0,0 +1,504 @@
  44 +/*
  45 + * Copyright (C) 2014 Freescale Semiconductor, Inc.
  46 + *
  47 + * This program is free software; you can redistribute it and/or modify
  48 + * it under the terms of the GNU General Public License version 2 as
  49 + * published by the Free Software Foundation.
  50 + */
  51 +
  52 +/ {
  53 +       memory {
  54 +               reg = <0x80000000 0x40000000>;
  55 +       };
  56 +
  57 +       battery: max8903@0 {
  58 +               compatible = "fsl,max8903-charger";
  59 +               pinctrl-names = "default";
  60 +               dok_input = <&gpio4 13 1>;
  61 +               uok_input = <&gpio4 13 1>;
  62 +               chg_input = <&gpio4 15 1>;
  63 +               flt_input = <&gpio4 14 1>;
  64 +               fsl,dcm_always_high;
  65 +               fsl,dc_valid;
  66 +               fsl,adc_disable;
  67 +               status = "okay";
  68 +       };
  69 +
  70 +       regulators {
  71 +               compatible = "simple-bus";
  72 +
  73 +               reg_lcd_3v3: lcd-3v3 {
  74 +                       compatible = "regulator-fixed";
  75 +                       regulator-name = "lcd-3v3";
  76 +                       gpio = <&gpio4 3 0>;
  77 +                       enable-active-high;
  78 +               };
  79 +
  80 +               reg_aud3v: wm8962_supply_3v15 {
  81 +                       compatible = "regulator-fixed";
  82 +                       regulator-name = "wm8962-supply-3v15";
  83 +                       regulator-min-microvolt = <3150000>;
  84 +                       regulator-max-microvolt = <3150000>;
  85 +                       regulator-boot-on;
  86 +               };
  87 +
  88 +               reg_aud4v: wm8962_supply_4v2 {
  89 +                       compatible = "regulator-fixed";
  90 +                       regulator-name = "wm8962-supply-4v2";
  91 +                       regulator-min-microvolt = <4325000>;
  92 +                       regulator-max-microvolt = <4325000>;
  93 +                       regulator-boot-on;
  94 +               };
  95 +
  96 +               reg_usb_otg1_vbus: usb_otg1_vbus {
  97 +                       compatible = "regulator-fixed";
  98 +                       regulator-name = "usb_otg1_vbus";
  99 +                       regulator-min-microvolt = <5000000>;
 100 +                       regulator-max-microvolt = <5000000>;
 101 +                       gpio = <&gpio4 0 0>;
 102 +                       enable-active-high;
 103 +               };
 104 +
 105 +               reg_usb_otg2_vbus: usb_otg2_vbus {
 106 +                       compatible = "regulator-fixed";
 107 +                       regulator-name = "usb_otg2_vbus";
 108 +                       regulator-min-microvolt = <5000000>;
 109 +                       regulator-max-microvolt = <5000000>;
 110 +                       gpio = <&gpio4 2 0>;
 111 +                       enable-active-high;
 112 +               };
 113 +       };
 114 +
 115 +       backlight {
 116 +               compatible = "pwm-backlight";
 117 +               pwms = <&pwm1 0 5000000>;
 118 +               brightness-levels = <0 4 8 16 32 64 128 255>;
 119 +               default-brightness-level = <6>;
 120 +       };
 121 +
 122 +       csi_v4l2_cap {
 123 +               compatible = "fsl,imx6sl-csi-v4l2";
 124 +               status = "disabled";
 125 +       };
 126 +
 127 +       pxp_v4l2_out {
 128 +               compatible = "fsl,imx6sl-pxp-v4l2";
 129 +               status = "okay";
 130 +       };
 131 +
 132 +       sound {
 133 +               compatible = "fsl,imx6q-sabresd-wm8962",
 134 +                          "fsl,imx-audio-wm8962";
 135 +               model = "wm8962-audio";
 136 +               ssi-controller = <&ssi2>;
 137 +               audio-codec = <&codec>;
 138 +               audio-routing =
 139 +                       "Headphone Jack", "HPOUTL",
 140 +                       "Headphone Jack", "HPOUTR",
 141 +                       "Ext Spk", "SPKOUTL",
 142 +                       "Ext Spk", "SPKOUTR",
 143 +                       "AMIC", "MICBIAS",
 144 +                       "IN3R", "AMIC";
 145 +               amic-mono;
 146 +               mux-int-port = <2>;
 147 +               mux-ext-port = <3>;
 148 +               hp-det-gpios = <&gpio4 19 1>;
 149 +       };
 150 +
 151 +       sound-spdif {
 152 +               compatible = "fsl,imx-audio-spdif",
 153 +                          "fsl,imx6sl-evk-spdif";
 154 +               model = "imx-spdif";
 155 +               spdif-controller = <&spdif>;
 156 +               spdif-out;
 157 +       };
 158 +
 159 +       sii902x_reset: sii902x-reset {
 160 +               compatible = "gpio-reset";
 161 +               reset-gpios = <&gpio2 19 1>;
 162 +               reset-delay-us = <100000>;
 163 +               #reset-cells = <0>;
 164 +       };
 165 +};
 166 +
 167 +&audmux {
 168 +       pinctrl-names = "default";
 169 +       pinctrl-0 = <&pinctrl_audmux_1>;
 170 +       status = "okay";
 171 +};
 172 +
 173 +&csi {
 174 +       status = "disabled";
 175 +};
 176 +
 177 +&ecspi1 {
 178 +       fsl,spi-num-chipselects = <1>;
 179 +       cs-gpios = <&gpio4 11 0>;
 180 +       pinctrl-names = "default";
 181 +       pinctrl-0 = <&pinctrl_ecspi1_1>;
 182 +       status = "okay";
 183 +
 184 +       flash: m25p80@0 {
 185 +               #address-cells = <1>;
 186 +               #size-cells = <1>;
 187 +               compatible = "st,m25p32";
 188 +               spi-max-frequency = <20000000>;
 189 +               reg = <0>;
 190 +       };
 191 +};
 192 +
 193 +&epdc {
 194 +       pinctrl-names = "default";
 195 +       pinctrl-0 = <&pinctrl_epdc_0>;
 196 +       V3P3-supply = <&V3P3_reg>;
 197 +       VCOM-supply = <&VCOM_reg>;
 198 +       DISPLAY-supply = <&DISPLAY_reg>;
 199 +       status = "okay";
 200 +};
 201 +
 202 +&cpu0 {
 203 +       arm-supply = <&sw1a_reg>;
 204 +       soc-supply = <&sw1c_reg>;
 205 +       pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
 206 +};
 207 +
 208 +&fec {
 209 +       pinctrl-names = "default", "sleep";
 210 +       pinctrl-0 = <&pinctrl_fec_1>;
 211 +       pinctrl-1 = <&pinctrl_fec_1_sleep>;
 212 +       phy-mode = "rmii";
 213 +       phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
 214 +       phy-reset-duration = <1>;
 215 +       status = "okay";
 216 +};
 217 +
 218 +&gpc {
 219 +       fsl,cpu_pupscr_sw2iso = <0xf>;
 220 +       fsl,cpu_pupscr_sw = <0xf>;
 221 +       fsl,cpu_pdnscr_iso2sw = <0x1>;
 222 +       fsl,cpu_pdnscr_iso = <0x1>;
 223 +       fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
 224 +       fsl,wdog-reset = <1>; /* watchdog select of reset source */
 225 +       pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 226 +};
 227 +
 228 +&gpu {
 229 +       pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 230 +};
 231 +
 232 +&i2c1 {
 233 +       clock-frequency = <100000>;
 234 +       pinctrl-names = "default";
 235 +       pinctrl-0 = <&pinctrl_i2c1_1>;
 236 +       status = "okay";
 237 +
 238 +       elan@10 {
 239 +               compatible = "elan,elan-touch";
 240 +               reg = <0x10>;
 241 +               interrupt-parent = <&gpio2>;
 242 +               interrupts = <10 2>;
 243 +               gpio_elan_cs = <&gpio2 9 0>;
 244 +               gpio_elan_rst = <&gpio4 4 0>;
 245 +               gpio_intr = <&gpio2 10 0>;
 246 +               status = "okay";
 247 +       };
 248 +
 249 +       max17135@48 {
 250 +               compatible = "maxim,max17135";
 251 +               reg = <0x48>;
 252 +               vneg_pwrup = <1>;
 253 +               gvee_pwrup = <2>;
 254 +               vpos_pwrup = <10>;
 255 +               gvdd_pwrup = <12>;
 256 +               gvdd_pwrdn = <1>;
 257 +               vpos_pwrdn = <2>;
 258 +               gvee_pwrdn = <8>;
 259 +               vneg_pwrdn = <10>;
 260 +               gpio_pmic_pwrgood = <&gpio2 13 0>;
 261 +               gpio_pmic_vcom_ctrl = <&gpio2 3 0>;
 262 +               gpio_pmic_wakeup = <&gpio2 14 0>;
 263 +               gpio_pmic_v3p3 = <&gpio2 7 0>;
 264 +               gpio_pmic_intr = <&gpio2 12 0>;
 265 +
 266 +               regulators {
 267 +                       DISPLAY_reg: DISPLAY {
 268 +                               regulator-name = "DISPLAY";
 269 +                       };
 270 +
 271 +                       GVDD_reg: GVDD {
 272 +                               /* 20v */
 273 +                               regulator-name = "GVDD";
 274 +                       };
 275 +
 276 +                       GVEE_reg: GVEE {
 277 +                               /* -22v */
 278 +                               regulator-name = "GVEE";
 279 +                       };
 280 +
 281 +                       HVINN_reg: HVINN {
 282 +                               /* -22v */
 283 +                               regulator-name = "HVINN";
 284 +                       };
 285 +
 286 +                       HVINP_reg: HVINP {
 287 +                               /* 20v */
 288 +                               regulator-name = "HVINP";
 289 +                       };
 290 +
 291 +                       VCOM_reg: VCOM {
 292 +                               regulator-name = "VCOM";
 293 +                               /* 2's-compliment, -4325000 */
 294 +                               regulator-min-microvolt = <0xffbe0178>;
 295 +                               /* 2's-compliment, -500000 */
 296 +                               regulator-max-microvolt = <0xfff85ee0>;
 297 +                       };
 298 +
 299 +                       VNEG_reg: VNEG {
 300 +                               /* -15v */
 301 +                               regulator-name = "VNEG";
 302 +                       };
 303 +
 304 +                       VPOS_reg: VPOS {
 305 +                               /* 15v */
 306 +                               regulator-name = "VPOS";
 307 +                       };
 308 +
 309 +                       V3P3_reg: V3P3 {
 310 +                               regulator-name = "V3P3";
 311 +                       };
 312 +               };
 313 +       };
 314 +
 315 +       mma8450@1c {
 316 +               compatible = "fsl,mma8450";
 317 +               reg = <0x1c>;
 318 +       };
 319 +};
 320 +
 321 +&i2c2 {
 322 +       clock-frequency = <100000>;
 323 +       pinctrl-names = "default";
 324 +       pinctrl-0 = <&pinctrl_i2c2_1>;
 325 +       status = "okay";
 326 +
 327 +       codec: wm8962@1a {
 328 +               compatible = "wlf,wm8962";
 329 +               reg = <0x1a>;
 330 +               clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
 331 +               DCVDD-supply = <&vgen3_reg>;
 332 +               DBVDD-supply = <&reg_aud3v>;
 333 +               AVDD-supply = <&vgen3_reg>;
 334 +               CPVDD-supply = <&vgen3_reg>;
 335 +               MICVDD-supply = <&reg_aud3v>;
 336 +               PLLVDD-supply = <&vgen3_reg>;
 337 +               SPKVDD1-supply = <&reg_aud4v>;
 338 +               SPKVDD2-supply = <&reg_aud4v>;
 339 +               amic-mono;
 340 +       };
 341 +
 342 +       sii902x@39 {
 343 +               compatible = "SiI,sii902x";
 344 +               interrupt-parent = <&gpio2>;
 345 +               interrupts = <10 2>;
 346 +               mode_str ="1280x720M@60";
 347 +               bits-per-pixel = <32>;
 348 +               resets = <&sii902x_reset>;
 349 +               reg = <0x39>;
 350 +       };
 351 +};
 352 +
 353 +&i2c3 {
 354 +       clock-frequency = <100000>;
 355 +       pinctrl-names = "default";
 356 +       pinctrl-0 = <&pinctrl_i2c3_1>;
 357 +       status = "disabled";
 358 +
 359 +       ov564x: ov564x@3c {
 360 +               compatible = "ovti,ov564x";
 361 +               reg = <0x3c>;
 362 +               pinctrl-names = "default";
 363 +               pinctrl-0 = <&pinctrl_csi_0>;
 364 +               clocks = <&clks IMX6SL_CLK_CSI>;
 365 +               clock-names = "csi_mclk";
 366 +               AVDD-supply = <&vgen6_reg>;  /* 2.8v */
 367 +               DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
 368 +               pwn-gpios = <&gpio1 25 1>;
 369 +               rst-gpios = <&gpio1 26 0>;
 370 +               csi_id = <0>;
 371 +               mclk = <24000000>;
 372 +               mclk_source = <0>;
 373 +       };
 374 +};
 375 +
 376 +&iomuxc {
 377 +       pinctrl-names = "default", "sleep";
 378 +       pinctrl-0 = <&pinctrl_hog>;
 379 +       pinctrl-1 = <&pinctrl_hog_sleep>;
 380 +
 381 +       hog {
 382 +               pinctrl_hog: hoggrp {
 383 +                       fsl,pins = <
 384 +                               MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
 385 +                               MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059
 386 +                               MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
 387 +                               MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
 388 +                               MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
 389 +                               MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21  0x80000000
 390 +                               MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x110b0
 391 +                               MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03  0x80000000
 392 +                               MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000
 393 +                               MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000
 394 +                               MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000
 395 +                               MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000
 396 +                               MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x170b0
 397 +                               MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000
 398 +                               MX6SL_PAD_KEY_COL6__GPIO4_IO04    0x110b0
 399 +                               MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000
 400 +                               MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000
 401 +                               MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15  0x17000
 402 +                               MX6SL_PAD_FEC_RX_ER__GPIO4_IO19   0x1b0b0
 403 +                               MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0
 404 +                               MX6SL_PAD_KEY_COL4__GPIO4_IO00  0x80000000
 405 +                               MX6SL_PAD_KEY_COL5__GPIO4_IO02  0x80000000
 406 +                       >;
 407 +               };
 408 +
 409 +               pinctrl_hog_sleep: hoggrp_sleep {
 410 +                       fsl,pins = <
 411 +                               MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x3080
 412 +                               MX6SL_PAD_KEY_COL6__GPIO4_IO04    0x3080
 413 +                               MX6SL_PAD_LCD_RESET__GPIO2_IO19   0x3080
 414 +                       >;
 415 +               };
 416 +       };
 417 +};
 418 +
 419 +&kpp {
 420 +       pinctrl-names = "default", "sleep";
 421 +       pinctrl-0 = <&pinctrl_kpp_1>;
 422 +       pinctrl-1 = <&pinctrl_kpp_1_sleep>;
 423 +       linux,keymap = <
 424 +                       0x00000067      /* KEY_UP */
 425 +                       0x0001006c      /* KEY_DOWN */
 426 +                       0x0002001c      /* KEY_ENTER */
 427 +                       0x01000066      /* KEY_HOME */
 428 +                       0x0101006a      /* KEY_RIGHT */
 429 +                       0x01020069      /* KEY_LEFT */
 430 +                       0x02000072      /* KEY_VOLUMEDOWN */
 431 +                       0x02010073      /* KEY_VOLUMEUP */
 432 +               >;
 433 +        status = "okay";
 434 +};
 435 +
 436 +&lcdif {
 437 +       pinctrl-names = "default";
 438 +       pinctrl-0 = <&pinctrl_lcdif_dat_0
 439 +                    &pinctrl_lcdif_ctrl_0>;
 440 +       lcd-supply = <&reg_lcd_3v3>;
 441 +       display = <&display>;
 442 +       status = "okay";
 443 +
 444 +       display: display {
 445 +               bits-per-pixel = <16>;
 446 +               bus-width = <24>;
 447 +
 448 +               display-timings {
 449 +                       native-mode = <&timing0>;
 450 +                       timing0: timing0 {
 451 +                               clock-frequency = <33500000>;
 452 +                               hactive = <800>;
 453 +                               vactive = <480>;
 454 +                               hback-porch = <89>;
 455 +                               hfront-porch = <164>;
 456 +                               vback-porch = <23>;
 457 +                               vfront-porch = <10>;
 458 +                               hsync-len = <10>;
 459 +                               vsync-len = <10>;
 460 +                               hsync-active = <0>;
 461 +                               vsync-active = <0>;
 462 +                               de-active = <1>;
 463 +                               pixelclk-active = <0>;
 464 +                       };
 465 +               };
 466 +       };
 467 +};
 468 +
 469 +&pwm1 {
 470 +       pinctrl-names = "default", "sleep";
 471 +       pinctrl-0 = <&pinctrl_pwm1_0>;
 472 +       pinctrl-1 = <&pinctrl_pwm1_0_sleep>;
 473 +       status = "okay";
 474 +};
 475 +
 476 +&pxp {
 477 +       status = "okay";
 478 +};
 479 +
 480 +&spdif {
 481 +       pinctrl-names = "default";
 482 +       pinctrl-0 = <&pinctrl_spdif_1>;
 483 +       status = "okay";
 484 +};
 485 +
 486 +&ssi2 {
 487 +       fsl,mode = "i2s-slave";
 488 +       status = "okay";
 489 +};
 490 +
 491 +&uart1 {
 492 +       pinctrl-names = "default";
 493 +       pinctrl-0 = <&pinctrl_uart1_1>;
 494 +       status = "okay";
 495 +};
 496 +
 497 +&usbotg1 {
 498 +       vbus-supply = <&reg_usb_otg1_vbus>;
 499 +       pinctrl-names = "default";
 500 +       pinctrl-0 = <&pinctrl_usbotg1_1>;
 501 +       disable-over-current;
 502 +       imx6-usb-charger-detection;
 503 +       status = "okay";
 504 +};
 505 +
 506 +&usbotg2 {
 507 +       vbus-supply = <&reg_usb_otg2_vbus>;
 508 +       dr_mode = "host";
 509 +       disable-over-current;
 510 +       status = "okay";
 511 +};
 512 +
 513 +&usdhc1 {
 514 +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
 515 +       pinctrl-0 = <&pinctrl_usdhc1_1>;
 516 +       pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
 517 +       pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
 518 +       bus-width = <8>;
 519 +       cd-gpios = <&gpio4 7 0>;
 520 +       wp-gpios = <&gpio4 6 0>;
 521 +       keep-power-in-suspend;
 522 +       enable-sdio-wakeup;
 523 +       status = "okay";
 524 +};
 525 +
 526 +&usdhc2 {
 527 +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
 528 +       pinctrl-0 = <&pinctrl_usdhc2_1>;
 529 +       pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
 530 +       pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
 531 +       cd-gpios = <&gpio5 0 0>;
 532 +       wp-gpios = <&gpio4 29 0>;
 533 +       keep-power-in-suspend;
 534 +       enable-sdio-wakeup;
 535 +       status = "okay";
 536 +};
 537 +
 538 +&usdhc3 {
 539 +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
 540 +       pinctrl-0 = <&pinctrl_usdhc3_1>;
 541 +       pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
 542 +       pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
 543 +       cd-gpios = <&gpio3 22 0>;
 544 +       keep-power-in-suspend;
 545 +       enable-sdio-wakeup;
 546 +       status = "okay";
 547 +};
 548 diff --git a/arch/arm/boot/dts/imx6sl-evk-pf200.dts b/arch/arm/boot/dts/imx6sl-evk-pf200.dts
 549 new file mode 100644
 550 index 0000000..55d3081
 551 --- /dev/null
 552 +++ b/arch/arm/boot/dts/imx6sl-evk-pf200.dts
 553 @@ -0,0 +1,122 @@
 554 +/*
 555 + * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
 556 + *
 557 + * This program is free software; you can redistribute it and/or modify
 558 + * it under the terms of the GNU General Public License version 2 as
 559 + * published by the Free Software Foundation.
 560 + */
 561 +
 562 +/dts-v1/;
 563 +
 564 +#include "imx6sl.dtsi"
 565 +#include "imx6sl-evk-common.dtsi"
 566 +
 567 +/ {
 568 +       model = "Freescale i.MX6 SoloLite EVK Board(PFUZE200)";
 569 +       compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
 570 +};
 571 +
 572 +&cpu0 {
 573 +       arm-supply = <&reg_arm>;
 574 +       soc-supply = <&reg_soc>;
 575 +       pu-supply = <&reg_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
 576 +};
 577 +
 578 +&gpc {
 579 +       fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
 580 +       fsl,wdog-reset = <1>; /* watchdog select of reset source */
 581 +       pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 582 +};
 583 +
 584 +&gpu {
 585 +       pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 586 +};
 587 +
 588 +&i2c1 {
 589 +       pmic: pfuze200@08 {
 590 +               compatible = "fsl,pfuze200";
 591 +               reg = <0x08>;
 592 +
 593 +               regulators {
 594 +                       sw1a_reg: sw1ab {
 595 +                               regulator-min-microvolt = <300000>;
 596 +                               regulator-max-microvolt = <1875000>;
 597 +                               regulator-boot-on;
 598 +                               regulator-always-on;
 599 +                               regulator-ramp-delay = <6250>;
 600 +                       };
 601 +
 602 +                       sw2_reg: sw2 {
 603 +                               regulator-min-microvolt = <800000>;
 604 +                               regulator-max-microvolt = <3300000>;
 605 +                               regulator-boot-on;
 606 +                               regulator-always-on;
 607 +                       };
 608 +
 609 +                       sw3a_reg: sw3a {
 610 +                               regulator-min-microvolt = <400000>;
 611 +                               regulator-max-microvolt = <1975000>;
 612 +                               regulator-boot-on;
 613 +                               regulator-always-on;
 614 +                       };
 615 +
 616 +                       sw3b_reg: sw3b {
 617 +                               regulator-min-microvolt = <400000>;
 618 +                               regulator-max-microvolt = <1975000>;
 619 +                               regulator-boot-on;
 620 +                               regulator-always-on;
 621 +                       };
 622 +
 623 +                       swbst_reg: swbst {
 624 +                               regulator-min-microvolt = <5000000>;
 625 +                               regulator-max-microvolt = <5150000>;
 626 +                       };
 627 +
 628 +                       snvs_reg: vsnvs {
 629 +                               regulator-min-microvolt = <1000000>;
 630 +                               regulator-max-microvolt = <3000000>;
 631 +                               regulator-boot-on;
 632 +                               regulator-always-on;
 633 +                       };
 634 +
 635 +                       vref_reg: vrefddr {
 636 +                               regulator-boot-on;
 637 +                               regulator-always-on;
 638 +                       };
 639 +
 640 +                       vgen1_reg: vgen1 {
 641 +                               regulator-min-microvolt = <800000>;
 642 +                               regulator-max-microvolt = <1550000>;
 643 +                       };
 644 +
 645 +                       vgen2_reg: vgen2 {
 646 +                               regulator-min-microvolt = <800000>;
 647 +                               regulator-max-microvolt = <1550000>;
 648 +                       };
 649 +
 650 +                       vgen3_reg: vgen3 {
 651 +                               regulator-min-microvolt = <1800000>;
 652 +                               regulator-max-microvolt = <3300000>;
 653 +                               regulator-always-on;
 654 +                       };
 655 +
 656 +                       vgen4_reg: vgen4 {
 657 +                               regulator-min-microvolt = <1800000>;
 658 +                               regulator-max-microvolt = <3300000>;
 659 +                               regulator-always-on;
 660 +                       };
 661 +
 662 +                       vgen5_reg: vgen5 {
 663 +                               regulator-min-microvolt = <1800000>;
 664 +                               regulator-max-microvolt = <3300000>;
 665 +                               regulator-always-on;
 666 +                       };
 667 +
 668 +                       vgen6_reg: vgen6 {
 669 +                               regulator-min-microvolt = <1800000>;
 670 +                               regulator-max-microvolt = <3300000>;
 671 +                               regulator-always-on;
 672 +                       };
 673 +               };
 674 +       };
 675 +};
 676 diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
 677 index 4966f38..ed0ce89 100644
 678 --- a/arch/arm/boot/dts/imx6sl-evk.dts
 679 +++ b/arch/arm/boot/dts/imx6sl-evk.dts
 680 @@ -1,5 +1,5 @@
 681  /*
 682 - * Copyright (C) 2013 Freescale Semiconductor, Inc.
 683 + * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
 684   *
 685   * This program is free software; you can redistribute it and/or modify
 686   * it under the terms of the GNU General Public License version 2 as
 687 @@ -9,195 +9,14 @@
 688  /dts-v1/;
 689
 690  #include "imx6sl.dtsi"
 691 +#include "imx6sl-evk-common.dtsi"
 692
 693  / {
 694 -       model = "Freescale i.MX6 SoloLite EVK Board";
 695 +       model = "Freescale i.MX6 SoloLite EVK Board(PFUZE100)";
 696         compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
 697 -
 698 -       memory {
 699 -               reg = <0x80000000 0x40000000>;
 700 -       };
 701 -
 702 -       battery: max8903@0 {
 703 -               compatible = "fsl,max8903-charger";
 704 -               pinctrl-names = "default";
 705 -               dok_input = <&gpio4 13 1>;
 706 -               uok_input = <&gpio4 13 1>;
 707 -               chg_input = <&gpio4 15 1>;
 708 -               flt_input = <&gpio4 14 1>;
 709 -               fsl,dcm_always_high;
 710 -               fsl,dc_valid;
 711 -               fsl,adc_disable;
 712 -               status = "okay";
 713 -       };
 714 -       regulators {
 715 -               compatible = "simple-bus";
 716 -
 717 -               reg_lcd_3v3: lcd-3v3 {
 718 -                       compatible = "regulator-fixed";
 719 -                       regulator-name = "lcd-3v3";
 720 -                       gpio = <&gpio4 3 0>;
 721 -                       enable-active-high;
 722 -               };
 723 -
 724 -               reg_aud3v: wm8962_supply_3v15 {
 725 -                       compatible = "regulator-fixed";
 726 -                       regulator-name = "wm8962-supply-3v15";
 727 -                       regulator-min-microvolt = <3150000>;
 728 -                       regulator-max-microvolt = <3150000>;
 729 -                       regulator-boot-on;
 730 -               };
 731 -
 732 -               reg_aud4v: wm8962_supply_4v2 {
 733 -                       compatible = "regulator-fixed";
 734 -                       regulator-name = "wm8962-supply-4v2";
 735 -                       regulator-min-microvolt = <4325000>;
 736 -                       regulator-max-microvolt = <4325000>;
 737 -                       regulator-boot-on;
 738 -               };
 739 -
 740 -               reg_usb_otg1_vbus: usb_otg1_vbus {
 741 -                       compatible = "regulator-fixed";
 742 -                       regulator-name = "usb_otg1_vbus";
 743 -                       regulator-min-microvolt = <5000000>;
 744 -                       regulator-max-microvolt = <5000000>;
 745 -                       gpio = <&gpio4 0 0>;
 746 -                       enable-active-high;
 747 -               };
 748 -
 749 -               reg_usb_otg2_vbus: usb_otg2_vbus {
 750 -                       compatible = "regulator-fixed";
 751 -                       regulator-name = "usb_otg2_vbus";
 752 -                       regulator-min-microvolt = <5000000>;
 753 -                       regulator-max-microvolt = <5000000>;
 754 -                       gpio = <&gpio4 2 0>;
 755 -                       enable-active-high;
 756 -               };
 757 -       };
 758 -
 759 -       backlight {
 760 -               compatible = "pwm-backlight";
 761 -               pwms = <&pwm1 0 5000000>;
 762 -               brightness-levels = <0 4 8 16 32 64 128 255>;
 763 -               default-brightness-level = <6>;
 764 -       };
 765 -
 766 -       csi_v4l2_cap {
 767 -               compatible = "fsl,imx6sl-csi-v4l2";
 768 -               status = "disabled";
 769 -       };
 770 -
 771 -       pxp_v4l2_out {
 772 -               compatible = "fsl,imx6sl-pxp-v4l2";
 773 -               status = "okay";
 774 -       };
 775 -
 776 -       sound {
 777 -               compatible = "fsl,imx6q-sabresd-wm8962",
 778 -                          "fsl,imx-audio-wm8962";
 779 -               model = "wm8962-audio";
 780 -               ssi-controller = <&ssi2>;
 781 -               audio-codec = <&codec>;
 782 -               audio-routing =
 783 -                       "Headphone Jack", "HPOUTL",
 784 -                       "Headphone Jack", "HPOUTR",
 785 -                       "Ext Spk", "SPKOUTL",
 786 -                       "Ext Spk", "SPKOUTR",
 787 -                       "AMIC", "MICBIAS",
 788 -                       "IN3R", "AMIC";
 789 -               amic-mono;
 790 -               mux-int-port = <2>;
 791 -               mux-ext-port = <3>;
 792 -               hp-det-gpios = <&gpio4 19 1>;
 793 -       };
 794 -
 795 -       sound-spdif {
 796 -               compatible = "fsl,imx-audio-spdif",
 797 -                          "fsl,imx6sl-evk-spdif";
 798 -               model = "imx-spdif";
 799 -               spdif-controller = <&spdif>;
 800 -               spdif-out;
 801 -       };
 802 -
 803 -       sii902x_reset: sii902x-reset {
 804 -               compatible = "gpio-reset";
 805 -               reset-gpios = <&gpio2 19 1>;
 806 -               reset-delay-us = <100000>;
 807 -               #reset-cells = <0>;
 808 -       };
 809 -};
 810 -
 811 -&audmux {
 812 -       pinctrl-names = "default";
 813 -       pinctrl-0 = <&pinctrl_audmux_1>;
 814 -       status = "okay";
 815 -};
 816 -
 817 -&csi {
 818 -       status = "disabled";
 819 -};
 820 -
 821 -&ecspi1 {
 822 -       fsl,spi-num-chipselects = <1>;
 823 -       cs-gpios = <&gpio4 11 0>;
 824 -       pinctrl-names = "default";
 825 -       pinctrl-0 = <&pinctrl_ecspi1_1>;
 826 -       status = "okay";
 827 -
 828 -       flash: m25p80@0 {
 829 -               #address-cells = <1>;
 830 -               #size-cells = <1>;
 831 -               compatible = "st,m25p32";
 832 -               spi-max-frequency = <20000000>;
 833 -               reg = <0>;
 834 -       };
 835 -};
 836 -
 837 -&epdc {
 838 -       pinctrl-names = "default";
 839 -       pinctrl-0 = <&pinctrl_epdc_0>;
 840 -       V3P3-supply = <&V3P3_reg>;
 841 -       VCOM-supply = <&VCOM_reg>;
 842 -       DISPLAY-supply = <&DISPLAY_reg>;
 843 -       status = "okay";
 844 -};
 845 -
 846 -&cpu0 {
 847 -       arm-supply = <&sw1a_reg>;
 848 -       soc-supply = <&sw1c_reg>;
 849 -       pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
 850 -};
 851 -
 852 -&fec {
 853 -       pinctrl-names = "default", "sleep";
 854 -       pinctrl-0 = <&pinctrl_fec_1>;
 855 -       pinctrl-1 = <&pinctrl_fec_1_sleep>;
 856 -       phy-mode = "rmii";
 857 -       phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
 858 -       phy-reset-duration = <1>;
 859 -       status = "okay";
 860 -};
 861 -
 862 -&gpc {
 863 -       fsl,cpu_pupscr_sw2iso = <0xf>;
 864 -       fsl,cpu_pupscr_sw = <0xf>;
 865 -       fsl,cpu_pdnscr_iso2sw = <0x1>;
 866 -       fsl,cpu_pdnscr_iso = <0x1>;
 867 -       fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
 868 -       fsl,wdog-reset = <1>; /* watchdog select of reset source */
 869 -       pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 870 -};
 871 -
 872 -&gpu {
 873 -       pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 874  };
 875
 876  &i2c1 {
 877 -       clock-frequency = <100000>;
 878 -       pinctrl-names = "default";
 879 -       pinctrl-0 = <&pinctrl_i2c1_1>;
 880 -       status = "okay";
 881 -
 882         pmic: pfuze100@08 {
 883                 compatible = "fsl,pfuze100";
 884                 reg = <0x08>;
 885 @@ -297,314 +116,4 @@
 886                         };
 887                 };
 888         };
 889 -
 890 -       elan@10 {
 891 -               compatible = "elan,elan-touch";
 892 -               reg = <0x10>;
 893 -               interrupt-parent = <&gpio2>;
 894 -               interrupts = <10 2>;
 895 -               gpio_elan_cs = <&gpio2 9 0>;
 896 -               gpio_elan_rst = <&gpio4 4 0>;
 897 -               gpio_intr = <&gpio2 10 0>;
 898 -               status = "okay";
 899 -       };
 900 -
 901 -       max17135@48 {
 902 -               compatible = "maxim,max17135";
 903 -               reg = <0x48>;
 904 -               vneg_pwrup = <1>;
 905 -               gvee_pwrup = <2>;
 906 -               vpos_pwrup = <10>;
 907 -               gvdd_pwrup = <12>;
 908 -               gvdd_pwrdn = <1>;
 909 -               vpos_pwrdn = <2>;
 910 -               gvee_pwrdn = <8>;
 911 -               vneg_pwrdn = <10>;
 912 -               gpio_pmic_pwrgood = <&gpio2 13 0>;
 913 -               gpio_pmic_vcom_ctrl = <&gpio2 3 0>;
 914 -               gpio_pmic_wakeup = <&gpio2 14 0>;
 915 -               gpio_pmic_v3p3 = <&gpio2 7 0>;
 916 -               gpio_pmic_intr = <&gpio2 12 0>;
 917 -
 918 -               regulators {
 919 -                       DISPLAY_reg: DISPLAY {
 920 -                               regulator-name = "DISPLAY";
 921 -                       };
 922 -
 923 -                       GVDD_reg: GVDD {
 924 -                               /* 20v */
 925 -                               regulator-name = "GVDD";
 926 -                       };
 927 -
 928 -                       GVEE_reg: GVEE {
 929 -                               /* -22v */
 930 -                               regulator-name = "GVEE";
 931 -                       };
 932 -
 933 -                       HVINN_reg: HVINN {
 934 -                               /* -22v */
 935 -                               regulator-name = "HVINN";
 936 -                       };
 937 -
 938 -                       HVINP_reg: HVINP {
 939 -                               /* 20v */
 940 -                               regulator-name = "HVINP";
 941 -                       };
 942 -
 943 -                       VCOM_reg: VCOM {
 944 -                               regulator-name = "VCOM";
 945 -                               /* 2's-compliment, -4325000 */
 946 -                               regulator-min-microvolt = <0xffbe0178>;
 947 -                               /* 2's-compliment, -500000 */
 948 -                               regulator-max-microvolt = <0xfff85ee0>;
 949 -                       };
 950 -
 951 -                       VNEG_reg: VNEG {
 952 -                               /* -15v */
 953 -                               regulator-name = "VNEG";
 954 -                       };
 955 -
 956 -                       VPOS_reg: VPOS {
 957 -                               /* 15v */
 958 -                               regulator-name = "VPOS";
 959 -                       };
 960 -
 961 -                       V3P3_reg: V3P3 {
 962 -                               regulator-name = "V3P3";
 963 -                       };
 964 -               };
 965 -       };
 966 -
 967 -       mma8450@1c {
 968 -               compatible = "fsl,mma8450";
 969 -               reg = <0x1c>;
 970 -       };
 971 -};
 972 -
 973 -&i2c2 {
 974 -       clock-frequency = <100000>;
 975 -       pinctrl-names = "default";
 976 -       pinctrl-0 = <&pinctrl_i2c2_1>;
 977 -       status = "okay";
 978 -
 979 -       codec: wm8962@1a {
 980 -               compatible = "wlf,wm8962";
 981 -               reg = <0x1a>;
 982 -               clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
 983 -               DCVDD-supply = <&vgen3_reg>;
 984 -               DBVDD-supply = <&reg_aud3v>;
 985 -               AVDD-supply = <&vgen3_reg>;
 986 -               CPVDD-supply = <&vgen3_reg>;
 987 -               MICVDD-supply = <&reg_aud3v>;
 988 -               PLLVDD-supply = <&vgen3_reg>;
 989 -               SPKVDD1-supply = <&reg_aud4v>;
 990 -               SPKVDD2-supply = <&reg_aud4v>;
 991 -               amic-mono;
 992 -       };
 993 -
 994 -       sii902x@39 {
 995 -               compatible = "SiI,sii902x";
 996 -               interrupt-parent = <&gpio2>;
 997 -               interrupts = <10 2>;
 998 -               mode_str ="1280x720M@60";
 999 -               bits-per-pixel = <32>;
1000 -               resets = <&sii902x_reset>;
1001 -               reg = <0x39>;
1002 -       };
1003 -};
1004 -
1005 -&i2c3 {
1006 -       clock-frequency = <100000>;
1007 -       pinctrl-names = "default";
1008 -       pinctrl-0 = <&pinctrl_i2c3_1>;
1009 -       status = "disabled";
1010 -
1011 -       ov564x: ov564x@3c {
1012 -               compatible = "ovti,ov564x";
1013 -               reg = <0x3c>;
1014 -               pinctrl-names = "default";
1015 -               pinctrl-0 = <&pinctrl_csi_0>;
1016 -               clocks = <&clks IMX6SL_CLK_CSI>;
1017 -               clock-names = "csi_mclk";
1018 -               AVDD-supply = <&vgen6_reg>;  /* 2.8v */
1019 -               DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
1020 -               pwn-gpios = <&gpio1 25 1>;
1021 -               rst-gpios = <&gpio1 26 0>;
1022 -               csi_id = <0>;
1023 -               mclk = <24000000>;
1024 -               mclk_source = <0>;
1025 -       };
1026 -};
1027 -
1028 -&iomuxc {
1029 -       pinctrl-names = "default", "sleep";
1030 -       pinctrl-0 = <&pinctrl_hog>;
1031 -       pinctrl-1 = <&pinctrl_hog_sleep>;
1032 -
1033 -       hog {
1034 -               pinctrl_hog: hoggrp {
1035 -                       fsl,pins = <
1036 -                               MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
1037 -                               MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059
1038 -                               MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
1039 -                               MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
1040 -                               MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
1041 -                               MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21  0x80000000
1042 -                               MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x110b0
1043 -                               MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03  0x80000000
1044 -                               MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000
1045 -                               MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000
1046 -                               MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000
1047 -                               MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000
1048 -                               MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x170b0
1049 -                               MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000
1050 -                               MX6SL_PAD_KEY_COL6__GPIO4_IO04    0x110b0
1051 -                               MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000
1052 -                               MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000
1053 -                               MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15  0x17000
1054 -                               MX6SL_PAD_FEC_RX_ER__GPIO4_IO19   0x1b0b0
1055 -                               MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0
1056 -                               MX6SL_PAD_KEY_COL4__GPIO4_IO00  0x80000000
1057 -                               MX6SL_PAD_KEY_COL5__GPIO4_IO02  0x80000000
1058 -                       >;
1059 -               };
1060 -
1061 -               pinctrl_hog_sleep: hoggrp_sleep {
1062 -                       fsl,pins = <
1063 -                               MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x3080
1064 -                               MX6SL_PAD_KEY_COL6__GPIO4_IO04    0x3080
1065 -                               MX6SL_PAD_LCD_RESET__GPIO2_IO19   0x3080
1066 -                       >;
1067 -               };
1068 -       };
1069 -};
1070 -
1071 -&kpp {
1072 -       pinctrl-names = "default", "sleep";
1073 -       pinctrl-0 = <&pinctrl_kpp_1>;
1074 -       pinctrl-1 = <&pinctrl_kpp_1_sleep>;
1075 -       linux,keymap = <
1076 -                       0x00000067      /* KEY_UP */
1077 -                       0x0001006c      /* KEY_DOWN */
1078 -                       0x0002001c      /* KEY_ENTER */
1079 -                       0x01000066      /* KEY_HOME */
1080 -                       0x0101006a      /* KEY_RIGHT */
1081 -                       0x01020069      /* KEY_LEFT */
1082 -                       0x02000072      /* KEY_VOLUMEDOWN */
1083 -                       0x02010073      /* KEY_VOLUMEUP */
1084 -               >;
1085 -        status = "okay";
1086 -};
1087 -
1088 -&lcdif {
1089 -       pinctrl-names = "default";
1090 -       pinctrl-0 = <&pinctrl_lcdif_dat_0
1091 -                    &pinctrl_lcdif_ctrl_0>;
1092 -       lcd-supply = <&reg_lcd_3v3>;
1093 -       display = <&display>;
1094 -       status = "okay";
1095 -
1096 -       display: display {
1097 -               bits-per-pixel = <16>;
1098 -               bus-width = <24>;
1099 -
1100 -               display-timings {
1101 -                       native-mode = <&timing0>;
1102 -                       timing0: timing0 {
1103 -                               clock-frequency = <33500000>;
1104 -                               hactive = <800>;
1105 -                               vactive = <480>;
1106 -                               hback-porch = <89>;
1107 -                               hfront-porch = <164>;
1108 -                               vback-porch = <23>;
1109 -                               vfront-porch = <10>;
1110 -                               hsync-len = <10>;
1111 -                               vsync-len = <10>;
1112 -                               hsync-active = <0>;
1113 -                               vsync-active = <0>;
1114 -                               de-active = <1>;
1115 -                               pixelclk-active = <0>;
1116 -                       };
1117 -               };
1118 -       };
1119 -};
1120 -
1121 -&pwm1 {
1122 -       pinctrl-names = "default", "sleep";
1123 -       pinctrl-0 = <&pinctrl_pwm1_0>;
1124 -       pinctrl-1 = <&pinctrl_pwm1_0_sleep>;
1125 -       status = "okay";
1126 -};
1127 -
1128 -&pxp {
1129 -       status = "okay";
1130 -};
1131 -
1132 -&spdif {
1133 -       pinctrl-names = "default";
1134 -       pinctrl-0 = <&pinctrl_spdif_1>;
1135 -       status = "okay";
1136 -};
1137 -
1138 -&ssi2 {
1139 -       fsl,mode = "i2s-slave";
1140 -       status = "okay";
1141 -};
1142 -
1143 -&uart1 {
1144 -       pinctrl-names = "default";
1145 -       pinctrl-0 = <&pinctrl_uart1_1>;
1146 -       status = "okay";
1147 -};
1148 -
1149 -&usbotg1 {
1150 -       vbus-supply = <&reg_usb_otg1_vbus>;
1151 -       pinctrl-names = "default";
1152 -       pinctrl-0 = <&pinctrl_usbotg1_1>;
1153 -       disable-over-current;
1154 -       imx6-usb-charger-detection;
1155 -       status = "okay";
1156 -};
1157 -
1158 -&usbotg2 {
1159 -       vbus-supply = <&reg_usb_otg2_vbus>;
1160 -       dr_mode = "host";
1161 -       disable-over-current;
1162 -       status = "okay";
1163 -};
1164 -
1165 -&usdhc1 {
1166 -       pinctrl-names = "default", "state_100mhz", "state_200mhz";
1167 -       pinctrl-0 = <&pinctrl_usdhc1_1>;
1168 -       pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
1169 -       pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
1170 -       bus-width = <8>;
1171 -       cd-gpios = <&gpio4 7 0>;
1172 -       wp-gpios = <&gpio4 6 0>;
1173 -       keep-power-in-suspend;
1174 -       enable-sdio-wakeup;
1175 -       status = "okay";
1176 -};
1177 -
1178 -&usdhc2 {
1179 -       pinctrl-names = "default", "state_100mhz", "state_200mhz";
1180 -       pinctrl-0 = <&pinctrl_usdhc2_1>;
1181 -       pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
1182 -       pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
1183 -       cd-gpios = <&gpio5 0 0>;
1184 -       wp-gpios = <&gpio4 29 0>;
1185 -       keep-power-in-suspend;
1186 -       enable-sdio-wakeup;
1187 -       status = "okay";
1188 -};
1189 -
1190 -&usdhc3 {
1191 -       pinctrl-names = "default", "state_100mhz", "state_200mhz";
1192 -       pinctrl-0 = <&pinctrl_usdhc3_1>;
1193 -       pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
1194 -       pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
1195 -       cd-gpios = <&gpio3 22 0>;
1196 -       keep-power-in-suspend;
1197 -       enable-sdio-wakeup;
1198 -       status = "okay";
1199  };
1200 --
1201 2.1.0
1202