1 From 2235b85f1c76d98b5f1e160cbd0a61a84c15e125 Mon Sep 17 00:00:00 2001
2 From: Ivan Djelic <ivan.djelic@parrot.com>
3 Date: Wed, 6 Mar 2013 20:09:27 +0100
4 Subject: [PATCH] ARM: 7668/1: fix memset-related crashes caused by recent GCC
6 Organization: O.S. Systems Software LTDA.
8 Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
9 assumptions about the implementation of memset and similar functions.
10 The current ARM optimized memset code does not return the value of
11 its first argument, as is usually expected from standard implementations.
13 For instance in the following function:
15 void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
17 memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
18 waiter->magic = waiter;
19 INIT_LIST_HEAD(&waiter->list);
24 800554d0 <debug_mutex_lock_common>:
25 800554d0: e92d4008 push {r3, lr}
26 800554d4: e1a00001 mov r0, r1
27 800554d8: e3a02010 mov r2, #16 ; 0x10
28 800554dc: e3a01011 mov r1, #17 ; 0x11
29 800554e0: eb04426e bl 80165ea0 <memset>
30 800554e4: e1a03000 mov r3, r0
31 800554e8: e583000c str r0, [r3, #12]
32 800554ec: e5830000 str r0, [r3]
33 800554f0: e5830004 str r0, [r3, #4]
34 800554f4: e8bd8008 pop {r3, pc}
36 GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
37 register/memory corruptions.
39 This patch fixes the return value of the assembly version of memset.
40 It adds a 'mov' instruction and merges an additional load+store into
41 existing load/store instructions.
42 For ease of review, here is a breakdown of the patch into 4 simple steps:
46 Perform the following substitutions:
49 and insert 'mov ip, r0' as the first statement of the function.
50 At this point, we have a memset() implementation returning the proper result,
51 but corrupting r8 on some paths (the ones that were using ip).
55 Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
61 and restore r8 on both exit paths:
62 - ldmeqfd sp!, {pc} @ Now <64 bytes to go.
63 + ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
66 stmneia ip!, {r1, r3, r8, lr}
72 Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
75 - stmfd sp!, {r4-r7, lr}
76 + stmfd sp!, {r4-r8, lr}
78 and restore r8 on both exit paths:
80 - ldmeqfd sp!, {r4-r7, pc}
81 + ldmeqfd sp!, {r4-r8, pc}
85 - ldmfd sp!, {r4-r7, lr}
86 + ldmfd sp!, {r4-r8, lr}
90 Rewrite register list "r4-r7, r8" as "r4-r8".
92 Upstream-Status: Pending
94 Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
95 Reviewed-by: Nicolas Pitre <nico@linaro.org>
96 Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
97 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
98 (cherry picked from commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5)
100 arch/arm/lib/memset.S | 85 ++++++++++++++++++++++++++-------------------------
101 1 file changed, 44 insertions(+), 41 deletions(-)
103 diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
104 index 650d592..d912e73 100644
105 --- a/arch/arm/lib/memset.S
106 +++ b/arch/arm/lib/memset.S
108 1: subs r2, r2, #4 @ 1 do we have enough
109 blt 5f @ 1 bytes to align with?
111 - strltb r1, [r0], #1 @ 1
112 - strleb r1, [r0], #1 @ 1
113 - strb r1, [r0], #1 @ 1
114 + strltb r1, [ip], #1 @ 1
115 + strleb r1, [ip], #1 @ 1
116 + strb r1, [ip], #1 @ 1
117 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
119 * The pointer is now aligned and the length is adjusted. Try doing the
124 - ands r3, r0, #3 @ 1 unaligned?
126 + * Preserve the contents of r0 for the return value.
129 + ands r3, ip, #3 @ 1 unaligned?
132 - * we know that the pointer in r0 is aligned to a word boundary.
133 + * we know that the pointer in ip is aligned to a word boundary.
135 orr r1, r1, r1, lsl #8
136 orr r1, r1, r1, lsl #16
137 @@ -43,29 +47,28 @@ ENTRY(memset)
141 - * We need an extra register for this loop - save the return address and
143 + * We need 2 extra registers for this loop - use r8 and the LR
147 + stmfd sp!, {r8, lr}
152 - stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
153 - stmgeia r0!, {r1, r3, ip, lr}
154 - stmgeia r0!, {r1, r3, ip, lr}
155 - stmgeia r0!, {r1, r3, ip, lr}
156 + stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
157 + stmgeia ip!, {r1, r3, r8, lr}
158 + stmgeia ip!, {r1, r3, r8, lr}
159 + stmgeia ip!, {r1, r3, r8, lr}
161 - ldmeqfd sp!, {pc} @ Now <64 bytes to go.
162 + ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
164 * No need to correct the count; we're only testing bits from now on
167 - stmneia r0!, {r1, r3, ip, lr}
168 - stmneia r0!, {r1, r3, ip, lr}
169 + stmneia ip!, {r1, r3, r8, lr}
170 + stmneia ip!, {r1, r3, r8, lr}
172 - stmneia r0!, {r1, r3, ip, lr}
174 + stmneia ip!, {r1, r3, r8, lr}
175 + ldmfd sp!, {r8, lr}
179 @@ -74,54 +77,54 @@ ENTRY(memset)
180 * whole cache lines at once.
183 - stmfd sp!, {r4-r7, lr}
184 + stmfd sp!, {r4-r8, lr}
201 - movs ip, ip, lsl #(32 - 4)
202 - stmcsia r0!, {r4, r5, r6, r7}
203 - stmmiia r0!, {r4, r5}
210 + movs r8, r8, lsl #(32 - 4)
211 + stmcsia ip!, {r4, r5, r6, r7}
212 + stmmiia ip!, {r4, r5}
218 - stmgeia r0!, {r1, r3-r7, ip, lr}
219 - stmgeia r0!, {r1, r3-r7, ip, lr}
220 + stmgeia ip!, {r1, r3-r8, lr}
221 + stmgeia ip!, {r1, r3-r8, lr}
223 - ldmeqfd sp!, {r4-r7, pc}
224 + ldmeqfd sp!, {r4-r8, pc}
227 - stmneia r0!, {r1, r3-r7, ip, lr}
228 + stmneia ip!, {r1, r3-r8, lr}
230 - stmneia r0!, {r4-r7}
231 - ldmfd sp!, {r4-r7, lr}
232 + stmneia ip!, {r4-r7}
233 + ldmfd sp!, {r4-r8, lr}
238 - stmneia r0!, {r1, r3}
239 + stmneia ip!, {r1, r3}
244 * When we get here, we've got less than 4 bytes to zero. We
245 * may have an unaligned pointer as well.
248 - strneb r1, [r0], #1
249 - strneb r1, [r0], #1
250 + strneb r1, [ip], #1
251 + strneb r1, [ip], #1
253 - strneb r1, [r0], #1
254 + strneb r1, [ip], #1