code.ossystems Code Review - meta-freescale.git/blob

   1 From 8deffb95c405d2dde68da4d2570e57b6f2ec8ae5 Mon Sep 17 00:00:00 2001
   2 From: Liu Ying <Ying.Liu@freescale.com>
   3 Date: Tue, 25 Oct 2011 14:16:30 +0800
   4 Subject: [PATCH] ENGR00160566 IPUv3:Improve IDMAC_LOCK_EN setting
   5
   6 1) Clear IDMAC_LOCK_EN when dual display is enabled
   7    to workaround black flash issue when playing video
   8    on DP-FG.
   9 2) Only set IDMAC_LOCK_EN for IPUv3M.
  10
  11 Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
  12 (cherry picked from commit 7c22da39601cfc6551292cbd2c5c1d9ee3b4fbfa)
  13 ---
  14  drivers/mxc/ipu3/ipu_common.c |   19 +++++++++++++++++--
  15  1 files changed, 17 insertions(+), 2 deletions(-)
  16
  17 diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c
  18 index 1f5ed8b..baf22dd 100644
  19 --- a/drivers/mxc/ipu3/ipu_common.c
  20 +++ b/drivers/mxc/ipu3/ipu_common.c
  21 @@ -386,7 +386,8 @@ static int ipu_probe(struct platform_device *pdev)
  22         __raw_writel(0x18800001L, IDMAC_CHA_PRI(0));
  23
  24         /* AXI burst setting for sync refresh channels */
  25 -       __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1);
  26 +       if (g_ipu_hw_rev == 3)
  27 +               __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1);
  28
  29         /* Set MCU_T to divide MCU access window into 2 */
  30         __raw_writel(0x00400000L | (IPU_MCU_T_DEFAULT << 18), IPU_DISP_GEN);
  31 @@ -989,6 +990,11 @@ void ipu_uninit_channel(ipu_channel_t channel)
  32
  33         __raw_writel(ipu_conf, IPU_CONF);
  34
  35 +       /* Restore IDMAC_LOCK_EN when we don't use dual display */
  36 +       if (!(ipu_di_use_count[0] && ipu_di_use_count[1]) &&
  37 +           _ipu_is_dmfc_chan(in_dma) && g_ipu_hw_rev == 3)
  38 +               __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1);
  39 +
  40         spin_unlock_irqrestore(&ipu_lock, lock_flags);
  41
  42         ipu_put_clk();
  43 @@ -1800,6 +1806,14 @@ int32_t ipu_enable_channel(ipu_channel_t channel)
  44                 ipu_conf |= IPU_CONF_SMFC_EN;
  45         __raw_writel(ipu_conf, IPU_CONF);
  46
  47 +       /* Clear IDMAC_LOCK_EN to workaround black flash for dual display */
  48 +       if (g_ipu_hw_rev == 3 && _ipu_is_dmfc_chan(in_dma)) {
  49 +               if (ipu_di_use_count[1] && ipu_di_use_count[0])
  50 +                       __raw_writel(0x0, IDMAC_CH_LOCK_EN_1);
  51 +               else
  52 +                       __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1);
  53 +       }
  54 +
  55         if (idma_is_valid(in_dma)) {
  56                 reg = __raw_readl(IDMAC_CHA_EN(in_dma));
  57                 __raw_writel(reg | idma_mask(in_dma), IDMAC_CHA_EN(in_dma));
  58 @@ -2782,7 +2796,8 @@ static int ipu_resume(struct platform_device *pdev)
  59                 __raw_writel(0x18800001L, IDMAC_CHA_PRI(0));
  60
  61                 /* AXI burst setting for sync refresh channels */
  62 -               __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1);
  63 +               if (g_ipu_hw_rev == 3)
  64 +                       __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1);
  65                 clk_disable(g_ipu_clk);
  66         }
  67         mutex_unlock(&ipu_clk_lock);
  68 --
  69 1.5.4.4
  70