code.ossystems Code Review - openembedded-core.git/blob

   1 From 99347f932bdf7d9b0bf8a4f36737ed128813c1a9 Mon Sep 17 00:00:00 2001
   2 From: meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>
   3 Date: Thu, 28 Apr 2011 22:39:59 +0000
   4 Subject: [PATCH 196/200] Backport 4.7 patchtes to 4.6
   5
   6 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@173137 138bc75d-0d04-0410-961f-82ee72b054a4
   7
   8 index d7357ee..d38ec9a 100644
   9 --- a/gcc/config/rs6000/altivec.md
  10 +++ b/gcc/config/rs6000/altivec.md
  11 @@ -2430,7 +2430,7 @@
  12
  13  (define_expand "vec_extract_evenv4si"
  14   [(set (match_operand:V4SI 0 "register_operand" "")
  15 -        (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "")
  16 +        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "")
  17                        (match_operand:V4SI 2 "register_operand" "")]
  18                       UNSPEC_EXTEVEN_V4SI))]
  19    "TARGET_ALTIVEC"
  20 @@ -2463,7 +2463,7 @@
  21
  22  (define_expand "vec_extract_evenv4sf"
  23   [(set (match_operand:V4SF 0 "register_operand" "")
  24 -        (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "")
  25 +        (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
  26                        (match_operand:V4SF 2 "register_operand" "")]
  27                        UNSPEC_EXTEVEN_V4SF))]
  28    "TARGET_ALTIVEC"
  29 @@ -2495,7 +2495,7 @@
  30  }")
  31
  32  (define_expand "vec_extract_evenv8hi"
  33 - [(set (match_operand:V4SI 0 "register_operand" "")
  34 + [(set (match_operand:V8HI 0 "register_operand" "")
  35          (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "")
  36                        (match_operand:V8HI 2 "register_operand" "")]
  37                        UNSPEC_EXTEVEN_V8HI))]
  38 @@ -2528,9 +2528,9 @@
  39  }")
  40
  41  (define_expand "vec_extract_evenv16qi"
  42 - [(set (match_operand:V4SI 0 "register_operand" "")
  43 -        (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "")
  44 -                      (match_operand:V16QI 2 "register_operand" "")]
  45 + [(set (match_operand:V16QI 0 "register_operand" "")
  46 +        (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "")
  47 +                       (match_operand:V16QI 2 "register_operand" "")]
  48                        UNSPEC_EXTEVEN_V16QI))]
  49    "TARGET_ALTIVEC"
  50    "
  51 @@ -2562,7 +2562,7 @@
  52
  53  (define_expand "vec_extract_oddv4si"
  54   [(set (match_operand:V4SI 0 "register_operand" "")
  55 -        (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "")
  56 +        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "")
  57                        (match_operand:V4SI 2 "register_operand" "")]
  58                        UNSPEC_EXTODD_V4SI))]
  59    "TARGET_ALTIVEC"
  60 @@ -2595,7 +2595,7 @@
  61
  62  (define_expand "vec_extract_oddv4sf"
  63   [(set (match_operand:V4SF 0 "register_operand" "")
  64 -        (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "")
  65 +        (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
  66                        (match_operand:V4SF 2 "register_operand" "")]
  67                        UNSPEC_EXTODD_V4SF))]
  68    "TARGET_ALTIVEC"
  69 diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md
  70 index 5335d9d..cbdfd58 100644
  71 --- a/gcc/config/rs6000/vector.md
  72 +++ b/gcc/config/rs6000/vector.md
  73 @@ -872,8 +872,8 @@
  74  ;; Under VSX, vectors of 4/8 byte alignments do not need to be aligned
  75  ;; since the load already handles it.
  76  (define_expand "movmisalign<mode>"
  77 - [(set (match_operand:VEC_N 0 "vfloat_operand" "")
  78 -       (match_operand:VEC_N 1 "vfloat_operand" ""))]
  79 + [(set (match_operand:VEC_N 0 "nonimmediate_operand" "")
  80 +       (match_operand:VEC_N 1 "any_operand" ""))]
  81   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_ALLOW_MOVMISALIGN"
  82   "")
  83
  84 index 8496460..8c0da54 100644
  85 --- a/gcc/testsuite/gcc.dg/torture/va-arg-25.c
  86 +++ b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
  87 @@ -3,6 +3,8 @@
  88  /* { dg-do run } */
  89  /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
  90  /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
  91 +/* { dg-options "-mabi=altivec -maltivec" { target { powerpc-*-* powerpc64-*-* } } } */
  92 +/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
  93
  94  #include <stdarg.h>
  95  #include <stdlib.h>
  96 diff --git a/gcc/testsuite/gcc.dg/torture/vector-1.c b/gcc/testsuite/gcc.dg/torture/vector-1.c
  97 index 9ab78aa..205fee6 100644
  98 --- a/gcc/testsuite/gcc.dg/torture/vector-1.c
  99 +++ b/gcc/testsuite/gcc.dg/torture/vector-1.c
 100 @@ -3,6 +3,8 @@
 101  /* { dg-do run } */
 102  /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 103  /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
 104 +/* { dg-options "-mabi=altivec" { target { powerpc-*-* powerpc64-*-* } } } */
 105 +/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
 106
 107  #define vector __attribute__((vector_size(16) ))
 108
 109 diff --git a/gcc/testsuite/gcc.dg/torture/vector-2.c b/gcc/testsuite/gcc.dg/torture/vector-2.c
 110 index bff9f82..6cc56cf 100644
 111 --- a/gcc/testsuite/gcc.dg/torture/vector-2.c
 112 +++ b/gcc/testsuite/gcc.dg/torture/vector-2.c
 113 @@ -3,6 +3,8 @@
 114  /* { dg-do run } */
 115  /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 116  /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
 117 +/* { dg-options "-mabi=altivec" { target { powerpc-*-* powerpc64-*-* } } } */
 118 +/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
 119
 120  #define vector __attribute__((vector_size(16) ))
 121
 122 diff --git a/gcc/testsuite/gcc.target/powerpc/pr48192.c b/gcc/testsuite/gcc.target/powerpc/pr48192.c
 123 new file mode 100644
 124 index 0000000..5159260
 125 --- /dev/null
 126 +++ b/gcc/testsuite/gcc.target/powerpc/pr48192.c
 127 @@ -0,0 +1,49 @@
 128 +/* { dg-do compile } */
 129 +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
 130 +/* { dg-require-effective-target powerpc_vsx_ok } */
 131 +/* { dg-options "-O3 -mcpu=power7 -std=gnu89" } */
 132 +
 133 +/* Make sure that the conditional macros vector, bool, and pixel are not
 134 +   considered as being defined.  */
 135 +
 136 +#ifdef bool
 137 +#error "bool is considered defined"
 138 +#endif
 139 +
 140 +#ifdef vector
 141 +#error "vector is considered defined"
 142 +#endif
 143 +
 144 +#ifdef pixel
 145 +#error "pixel is condsidered defined"
 146 +#endif
 147 +
 148 +#if defined(bool)
 149 +#error "bool is considered defined"
 150 +#endif
 151 +
 152 +#if defined(vector)
 153 +#error "vector is considered defined"
 154 +#endif
 155 +
 156 +#if defined(pixel)
 157 +#error "pixel is condsidered defined"
 158 +#endif
 159 +
 160 +#ifndef bool
 161 +#else
 162 +#error "bool is considered defined"
 163 +#endif
 164 +
 165 +#ifndef vector
 166 +#else
 167 +#error "vector is considered defined"
 168 +#endif
 169 +
 170 +#ifndef pixel
 171 +#else
 172 +#error "pixel is condsidered defined"
 173 +#endif
 174 +
 175 +#define bool long double
 176 +bool pixel = 0;
 177 index 85a17b1..f244ae5 100644
 178 --- a/libcpp/directives.c
 179 +++ b/libcpp/directives.c
 180 @@ -1819,7 +1819,12 @@ do_ifdef (cpp_reader *pfile)
 181
 182        if (node)
 183         {
 184 -         skip = node->type != NT_MACRO;
 185 +         /* Do not treat conditional macros as being defined.  This is due to
 186 +            the powerpc and spu ports using conditional macros for 'vector',
 187 +            'bool', and 'pixel' to act as conditional keywords.  This messes
 188 +            up tests like #ifndef bool.  */
 189 +         skip = (node->type != NT_MACRO
 190 +                 || ((node->flags & NODE_CONDITIONAL) != 0));
 191           _cpp_mark_macro_used (node);
 192           if (!(node->flags & NODE_USED))
 193             {
 194 @@ -1860,7 +1865,12 @@ do_ifndef (cpp_reader *pfile)
 195
 196        if (node)
 197         {
 198 -         skip = node->type == NT_MACRO;
 199 +         /* Do not treat conditional macros as being defined.  This is due to
 200 +            the powerpc and spu ports using conditional macros for 'vector',
 201 +            'bool', and 'pixel' to act as conditional keywords.  This messes
 202 +            up tests like #ifndef bool.  */
 203 +         skip = (node->type == NT_MACRO
 204 +                 && ((node->flags & NODE_CONDITIONAL) == 0));
 205           _cpp_mark_macro_used (node);
 206           if (!(node->flags & NODE_USED))
 207             {
 208 diff --git a/libcpp/expr.c b/libcpp/expr.c
 209 index d2fec2a..3c36127 100644
 210 --- a/libcpp/expr.c
 211 +++ b/libcpp/expr.c
 212 @@ -720,10 +720,15 @@ parse_defined (cpp_reader *pfile)
 213
 214    pfile->state.prevent_expansion--;
 215
 216 +  /* Do not treat conditional macros as being defined.  This is due to the
 217 +     powerpc and spu ports using conditional macros for 'vector', 'bool', and
 218 +     'pixel' to act as conditional keywords.  This messes up tests like #ifndef
 219 +     bool.  */
 220    result.unsignedp = false;
 221    result.high = 0;
 222    result.overflow = false;
 223 -  result.low = node && node->type == NT_MACRO;
 224 +  result.low = (node && node->type == NT_MACRO
 225 +               && (node->flags & NODE_CONDITIONAL) == 0);
 226    return result;
 227  }
 228
 229 --
 230 1.7.0.4
 231