1 From 95d9b53d5f0afdfe3487c5bd55a23f9503a2adad Mon Sep 17 00:00:00 2001
2 From: Eric Nelson <eric.nelson@boundarydevices.com>
3 Date: Tue, 1 May 2012 09:55:11 +0000
4 Subject: [PATCH 27/56] i.MX6: mx6q_sabrelite: add SATA bindings
6 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
7 Acked-by: Marek Vasut <marex@denx.de>
8 Acked-by: stefano Babic <sbabic@denx.de>
10 board/freescale/mx6qsabrelite/mx6qsabrelite.c | 31 +++++++++++++++++++++++++
11 include/configs/mx6qsabrelite.h | 13 +++++++++++
12 2 files changed, 44 insertions(+)
14 diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
15 index 90773aa..29cbfed 100644
16 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
17 +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
19 #include <asm/arch/imx-regs.h>
20 #include <asm/arch/mx6x_pins.h>
21 #include <asm/arch/iomux-v3.h>
22 +#include <asm/arch/clock.h>
23 #include <asm/errno.h>
26 @@ -293,6 +294,32 @@ static void setup_buttons(void)
27 ARRAY_SIZE(button_pads));
30 +#ifdef CONFIG_CMD_SATA
34 + struct iomuxc_base_regs *const iomuxc_regs
35 + = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
36 + int ret = enable_sata_clock();
40 + clrsetbits_le32(&iomuxc_regs->gpr[13],
41 + IOMUXC_GPR13_SATA_MASK,
42 + IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
43 + |IOMUXC_GPR13_SATA_PHY_7_SATA2M
44 + |IOMUXC_GPR13_SATA_SPEED_3G
45 + |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
46 + |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
47 + |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
48 + |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
49 + |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
50 + |IOMUXC_GPR13_SATA_PHY_1_SLOW);
56 int board_early_init_f(void)
59 @@ -310,6 +337,10 @@ int board_init(void)
63 +#ifdef CONFIG_CMD_SATA
70 diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
71 index 48be6e6..feabc05 100644
72 --- a/include/configs/mx6qsabrelite.h
73 +++ b/include/configs/mx6qsabrelite.h
75 #define CONFIG_CMD_FAT
76 #define CONFIG_DOS_PARTITION
78 +#define CONFIG_CMD_SATA
82 +#ifdef CONFIG_CMD_SATA
83 +#define CONFIG_DWC_AHSATA
84 +#define CONFIG_SYS_SATA_MAX_DEVICE 1
85 +#define CONFIG_DWC_AHSATA_PORT_ID 0
86 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
88 +#define CONFIG_LIBATA
91 #define CONFIG_CMD_PING
92 #define CONFIG_CMD_DHCP
93 #define CONFIG_CMD_MII