]> code.ossystems Code Review - openembedded-core.git/blob
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1 Upstream-Status: Inappropriate [Backport]
2 From 99347f932bdf7d9b0bf8a4f36737ed128813c1a9 Mon Sep 17 00:00:00 2001
3 From: meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>
4 Date: Thu, 28 Apr 2011 22:39:59 +0000
5 Subject: [PATCH 196/200] Backport 4.7 patchtes to 4.6
6
7 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@173137 138bc75d-0d04-0410-961f-82ee72b054a4
8
9 index d7357ee..d38ec9a 100644
10 --- a/gcc/config/rs6000/altivec.md
11 +++ b/gcc/config/rs6000/altivec.md
12 @@ -2430,7 +2430,7 @@
13  
14  (define_expand "vec_extract_evenv4si"
15   [(set (match_operand:V4SI 0 "register_operand" "")
16 -        (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "")
17 +        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "")
18                        (match_operand:V4SI 2 "register_operand" "")]
19                       UNSPEC_EXTEVEN_V4SI))]
20    "TARGET_ALTIVEC"
21 @@ -2463,7 +2463,7 @@
22  
23  (define_expand "vec_extract_evenv4sf"
24   [(set (match_operand:V4SF 0 "register_operand" "")
25 -        (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "")
26 +        (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
27                        (match_operand:V4SF 2 "register_operand" "")]
28                        UNSPEC_EXTEVEN_V4SF))]
29    "TARGET_ALTIVEC"
30 @@ -2495,7 +2495,7 @@
31  }")
32  
33  (define_expand "vec_extract_evenv8hi"
34 - [(set (match_operand:V4SI 0 "register_operand" "")
35 + [(set (match_operand:V8HI 0 "register_operand" "")
36          (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "")
37                        (match_operand:V8HI 2 "register_operand" "")]
38                        UNSPEC_EXTEVEN_V8HI))]
39 @@ -2528,9 +2528,9 @@
40  }")
41  
42  (define_expand "vec_extract_evenv16qi"
43 - [(set (match_operand:V4SI 0 "register_operand" "")
44 -        (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "")
45 -                      (match_operand:V16QI 2 "register_operand" "")]
46 + [(set (match_operand:V16QI 0 "register_operand" "")
47 +        (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "")
48 +                       (match_operand:V16QI 2 "register_operand" "")]
49                        UNSPEC_EXTEVEN_V16QI))]
50    "TARGET_ALTIVEC"
51    "
52 @@ -2562,7 +2562,7 @@
53  
54  (define_expand "vec_extract_oddv4si"
55   [(set (match_operand:V4SI 0 "register_operand" "")
56 -        (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "")
57 +        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "")
58                        (match_operand:V4SI 2 "register_operand" "")]
59                        UNSPEC_EXTODD_V4SI))]
60    "TARGET_ALTIVEC"
61 @@ -2595,7 +2595,7 @@
62  
63  (define_expand "vec_extract_oddv4sf"
64   [(set (match_operand:V4SF 0 "register_operand" "")
65 -        (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "")
66 +        (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
67                        (match_operand:V4SF 2 "register_operand" "")]
68                        UNSPEC_EXTODD_V4SF))]
69    "TARGET_ALTIVEC"
70 diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md
71 index 5335d9d..cbdfd58 100644
72 --- a/gcc/config/rs6000/vector.md
73 +++ b/gcc/config/rs6000/vector.md
74 @@ -872,8 +872,8 @@
75  ;; Under VSX, vectors of 4/8 byte alignments do not need to be aligned
76  ;; since the load already handles it.
77  (define_expand "movmisalign<mode>"
78 - [(set (match_operand:VEC_N 0 "vfloat_operand" "")
79 -       (match_operand:VEC_N 1 "vfloat_operand" ""))]
80 + [(set (match_operand:VEC_N 0 "nonimmediate_operand" "")
81 +       (match_operand:VEC_N 1 "any_operand" ""))]
82   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_ALLOW_MOVMISALIGN"
83   "")
84  
85 index 8496460..8c0da54 100644
86 --- a/gcc/testsuite/gcc.dg/torture/va-arg-25.c
87 +++ b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
88 @@ -3,6 +3,8 @@
89  /* { dg-do run } */
90  /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
91  /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
92 +/* { dg-options "-mabi=altivec -maltivec" { target { powerpc-*-* powerpc64-*-* } } } */
93 +/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
94  
95  #include <stdarg.h>
96  #include <stdlib.h>
97 diff --git a/gcc/testsuite/gcc.dg/torture/vector-1.c b/gcc/testsuite/gcc.dg/torture/vector-1.c
98 index 9ab78aa..205fee6 100644
99 --- a/gcc/testsuite/gcc.dg/torture/vector-1.c
100 +++ b/gcc/testsuite/gcc.dg/torture/vector-1.c
101 @@ -3,6 +3,8 @@
102  /* { dg-do run } */
103  /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
104  /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
105 +/* { dg-options "-mabi=altivec" { target { powerpc-*-* powerpc64-*-* } } } */
106 +/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
107  
108  #define vector __attribute__((vector_size(16) ))
109  
110 diff --git a/gcc/testsuite/gcc.dg/torture/vector-2.c b/gcc/testsuite/gcc.dg/torture/vector-2.c
111 index bff9f82..6cc56cf 100644
112 --- a/gcc/testsuite/gcc.dg/torture/vector-2.c
113 +++ b/gcc/testsuite/gcc.dg/torture/vector-2.c
114 @@ -3,6 +3,8 @@
115  /* { dg-do run } */
116  /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
117  /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
118 +/* { dg-options "-mabi=altivec" { target { powerpc-*-* powerpc64-*-* } } } */
119 +/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
120  
121  #define vector __attribute__((vector_size(16) ))
122  
123 diff --git a/gcc/testsuite/gcc.target/powerpc/pr48192.c b/gcc/testsuite/gcc.target/powerpc/pr48192.c
124 new file mode 100644
125 index 0000000..5159260
126 --- /dev/null
127 +++ b/gcc/testsuite/gcc.target/powerpc/pr48192.c
128 @@ -0,0 +1,49 @@
129 +/* { dg-do compile } */
130 +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
131 +/* { dg-require-effective-target powerpc_vsx_ok } */
132 +/* { dg-options "-O3 -mcpu=power7 -std=gnu89" } */
133 +
134 +/* Make sure that the conditional macros vector, bool, and pixel are not
135 +   considered as being defined.  */
136 +
137 +#ifdef bool
138 +#error "bool is considered defined"
139 +#endif
140 +
141 +#ifdef vector
142 +#error "vector is considered defined"
143 +#endif
144 +
145 +#ifdef pixel
146 +#error "pixel is condsidered defined"
147 +#endif
148 +
149 +#if defined(bool)
150 +#error "bool is considered defined"
151 +#endif
152 +
153 +#if defined(vector)
154 +#error "vector is considered defined"
155 +#endif
156 +
157 +#if defined(pixel)
158 +#error "pixel is condsidered defined"
159 +#endif
160 +
161 +#ifndef bool
162 +#else
163 +#error "bool is considered defined"
164 +#endif
165 +
166 +#ifndef vector
167 +#else
168 +#error "vector is considered defined"
169 +#endif
170 +
171 +#ifndef pixel
172 +#else
173 +#error "pixel is condsidered defined"
174 +#endif
175 +
176 +#define bool long double
177 +bool pixel = 0;
178 index 85a17b1..f244ae5 100644
179 --- a/libcpp/directives.c
180 +++ b/libcpp/directives.c
181 @@ -1819,7 +1819,12 @@ do_ifdef (cpp_reader *pfile)
182  
183        if (node)
184         {
185 -         skip = node->type != NT_MACRO;
186 +         /* Do not treat conditional macros as being defined.  This is due to
187 +            the powerpc and spu ports using conditional macros for 'vector',
188 +            'bool', and 'pixel' to act as conditional keywords.  This messes
189 +            up tests like #ifndef bool.  */
190 +         skip = (node->type != NT_MACRO
191 +                 || ((node->flags & NODE_CONDITIONAL) != 0));
192           _cpp_mark_macro_used (node);
193           if (!(node->flags & NODE_USED))
194             {
195 @@ -1860,7 +1865,12 @@ do_ifndef (cpp_reader *pfile)
196  
197        if (node)
198         {
199 -         skip = node->type == NT_MACRO;
200 +         /* Do not treat conditional macros as being defined.  This is due to
201 +            the powerpc and spu ports using conditional macros for 'vector',
202 +            'bool', and 'pixel' to act as conditional keywords.  This messes
203 +            up tests like #ifndef bool.  */
204 +         skip = (node->type == NT_MACRO
205 +                 && ((node->flags & NODE_CONDITIONAL) == 0));
206           _cpp_mark_macro_used (node);
207           if (!(node->flags & NODE_USED))
208             {
209 diff --git a/libcpp/expr.c b/libcpp/expr.c
210 index d2fec2a..3c36127 100644
211 --- a/libcpp/expr.c
212 +++ b/libcpp/expr.c
213 @@ -720,10 +720,15 @@ parse_defined (cpp_reader *pfile)
214  
215    pfile->state.prevent_expansion--;
216  
217 +  /* Do not treat conditional macros as being defined.  This is due to the
218 +     powerpc and spu ports using conditional macros for 'vector', 'bool', and
219 +     'pixel' to act as conditional keywords.  This messes up tests like #ifndef
220 +     bool.  */
221    result.unsignedp = false;
222    result.high = 0;
223    result.overflow = false;
224 -  result.low = node && node->type == NT_MACRO;
225 +  result.low = (node && node->type == NT_MACRO
226 +               && (node->flags & NODE_CONDITIONAL) == 0);
227    return result;
228  }
229  
230 -- 
231 1.7.0.4
232