1 From 0e981452d7130513e796c1c3d7348905c0d00dce Mon Sep 17 00:00:00 2001
2 From: Gary Bisson <bisson.gary@gmail.com>
3 Date: Tue, 2 Dec 2014 22:11:14 -0800
4 Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
6 As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
7 to 1. As the table index was wrong, a divider a of 4 could still be
8 requested which implied the clock not to be set properly. This is the
9 root cause of the HDMI not working at high resolution on T1.0 version of
10 the SoC, giving the following error:
11 mxc_sdc_fb fb.27: timeout when waiting for flip irq
13 Upstream-Status: Pending
15 Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
17 arch/arm/mach-imx/clk-imx6q.c | 2 +-
18 1 file changed, 1 insertion(+), 1 deletion(-)
20 diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
21 index 25734ed..34e1616f 100644
22 --- a/arch/arm/mach-imx/clk-imx6q.c
23 +++ b/arch/arm/mach-imx/clk-imx6q.c
24 @@ -312,7 +312,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
25 post_div_table[1].div = 1;
26 post_div_table[2].div = 1;
27 video_div_table[1].div = 1;
28 - video_div_table[2].div = 1;
29 + video_div_table[3].div = 1;
32 /* type name parent_name base div_mask */
