1 From 2feeb3198c6d9771f20c03bc1363db40241fd8f5 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3 Date: Tue, 21 Feb 2012 01:05:43 +0100
4 Subject: [PATCH 3/7] i.MX53: add silicn revision functions
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Signed-off-by: Eric Bénard <eric@eukrea.com>
11 Upstream-Status: Applied for 2012.04.0
13 arch/arm/mach-imx/imx53.c | 45 +++++++++++++++++++++++++++
14 arch/arm/mach-imx/include/mach/imx53-regs.h | 5 +++
15 2 files changed, 50 insertions(+), 0 deletions(-)
17 diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
18 index 2fb18e7..ad45be3 100644
19 --- a/arch/arm/mach-imx/imx53.c
20 +++ b/arch/arm/mach-imx/imx53.c
21 @@ -37,6 +37,51 @@ void *imx_gpio_base[] = {
23 int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
27 +static u32 mx53_silicon_revision;
28 +static char *mx53_rev_string = "unknown";
30 +int imx_silicon_revision(void)
32 + return mx53_silicon_revision;
35 +static int query_silicon_revision(void)
37 + void __iomem *rom = MX53_IROM_BASE_ADDR;
40 + rev = readl(rom + SI_REV);
43 + mx53_silicon_revision = MX53_CHIP_REV_1_0;
44 + mx53_rev_string = "1.0";
47 + mx53_silicon_revision = MX53_CHIP_REV_2_0;
48 + mx53_rev_string = "2.0";
51 + mx53_silicon_revision = MX53_CHIP_REV_2_1;
52 + mx53_rev_string = "2.1";
55 + mx53_silicon_revision = 0;
60 +core_initcall(query_silicon_revision);
62 +static int imx53_print_silicon_rev(void)
64 + printf("detected i.MX53 rev %s\n", mx53_rev_string);
68 +device_initcall(imx53_print_silicon_rev);
70 static int imx53_init(void)
72 add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K,
73 diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h
74 index 8fefc54..065bf08 100644
75 --- a/arch/arm/mach-imx/include/mach/imx53-regs.h
76 +++ b/arch/arm/mach-imx/include/mach/imx53-regs.h
78 #define MX53_CS2_96MB_BASE_ADDR 0xF6000000
79 #define MX53_CS3_BASE_ADDR 0xF6000000
81 +/* silicon revisions specific to i.MX53 */
82 +#define MX53_CHIP_REV_1_0 0x10
83 +#define MX53_CHIP_REV_2_0 0x20
84 +#define MX53_CHIP_REV_2_1 0x21
86 #endif /* __MACH_IMX53_REGS_H */