1 Upstream-Status: Backport
3 From 97beee82f0e45e65308083a7e4cfaab57623733c Mon Sep 17 00:00:00 2001
5 Date: Mon, 19 Dec 2011 10:34:15 +0000
6 Subject: [PATCH 035/262] 2011-12-19 Chung-Lin Tang
7 <cltang@codesourcery.com>
9 Backport from mainline:
11 2011-12-13 Chung-Lin Tang <cltang@codesourcery.com>
13 * elfxx-mips.c (mips_elf_calculate_relocation): Correct
14 R_MIPS16_HI16/R_MIPS16_LO16 handling of two cleared lower bits,
17 diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
18 index 6b908ad..3939183 100644
19 --- a/bfd/elfxx-mips.c
20 +++ b/bfd/elfxx-mips.c
21 @@ -5531,10 +5531,11 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
24 So the offsets of hi and lo relocs are the same, but the
25 - $pc is four higher than $t9 would be, so reduce
26 - both reloc addends by 4. */
27 + base $pc is that used by the ADDIUPC instruction at $t9 + 4.
28 + ADDIUPC clears the low two bits of the instruction address,
29 + so the base is ($t9 + 4) & ~3. */
30 if (r_type == R_MIPS16_HI16)
31 - value = mips_elf_high (addend + gp - p - 4);
32 + value = mips_elf_high (addend + gp - ((p + 4) & ~(bfd_vma) 0x3));
33 /* The microMIPS .cpload sequence uses the same assembly
34 instructions as the traditional psABI version, but the
35 incoming $t9 has the low bit set. */
36 @@ -5557,7 +5558,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
37 /* See the comment for R_MIPS16_HI16 above for the reason
38 for this conditional. */
39 if (r_type == R_MIPS16_LO16)
40 - value = addend + gp - p;
41 + value = addend + gp - (p & ~(bfd_vma) 0x3);
42 else if (r_type == R_MICROMIPS_LO16
43 || r_type == R_MICROMIPS_HI0_LO16)
44 value = addend + gp - p + 3;