]> code.ossystems Code Review - openembedded-core.git/commit
nspr: Add RISC-V support
authorAlistair Francis <alistair.francis@wdc.com>
Thu, 21 Jun 2018 21:26:48 +0000 (14:26 -0700)
committerRichard Purdie <richard.purdie@linuxfoundation.org>
Mon, 2 Jul 2018 21:06:06 +0000 (22:06 +0100)
commit47b76dd02007e96fc95099524d43d517daf2aa6e
treec0df1f86766ce30097f3daa966d8a00cd89d58f1
parent188f4d258587a8bed9c91922ed8d141dbea4232d
nspr: Add RISC-V support

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
meta/recipes-support/nspr/nspr/0003-Add-type-definitions-for-the-RISC-V-architecture.patch [new file with mode: 0644]
meta/recipes-support/nspr/nspr_4.19.bb