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(parent: 6dd430c) | patch
mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registers
authorFabio Estevam <fabio.estevam@freescale.com>
Fri, 3 May 2013 04:37:12 +0000 (04:37 +0000)
committerOtavio Salvador <otavio@ossystems.com.br>
Mon, 6 May 2013 15:17:34 +0000 (12:17 -0300)
commitcc6f5503db35b4f00ebd39904bf1e91038241dd3
treefdc1c26cbdd38a63c7ee1921bd94f4d16e22272btree | snapshot
parent6dd430c84eda9070dc38f5c09269f699d0f781ddcommit | diff
mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registers

HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per
FSL bootlets code.

mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".

HW_DRAM_CTL8 is setup as the last element.

So skip the initialization of these DRAM_CTL registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c diff | blob | history
U-Boot repository with O.S. Systems patches and backports