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net: fec_mxc: Adjust RX DMA alignment for mx6solox
authorFabio Estevam <fabio.estevam@freescale.com>
Mon, 25 Aug 2014 16:34:16 +0000 (13:34 -0300)
committerOtavio Salvador <otavio@ossystems.com.br>
Tue, 9 Sep 2014 15:30:35 +0000 (12:30 -0300)
commitd5e440b473101bfa4dc899d297ea47fd00bc55e2
tree833878d8811f6151e3295af475c8f19f195f0f1ctree | snapshot
parentfca8b5aece70eb3d6290487d76ec930189bba8a3commit | diff
net: fec_mxc: Adjust RX DMA alignment for mx6solox

mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.

Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
which addresses the needs from mx6solox and also works for the other SoCs.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
drivers/net/fec_mxc.c diff | blob | history
U-Boot repository with O.S. Systems patches and backports