]> code.ossystems Code Review - bsp/u-boot.git/commitdiff
cgtqmx6eval: Fix SPL support
authorOtavio Salvador <otavio@ossystems.com.br>
Thu, 29 Oct 2015 21:53:57 +0000 (19:53 -0200)
committerOtavio Salvador <otavio@ossystems.com.br>
Fri, 30 Oct 2015 10:45:02 +0000 (08:45 -0200)
The patchset had some changes for approval on the U-Boot. Basically:

- Add missing CONFIG_BOARD_LATE_INIT
- Fix checkpatch error

This patch integrate those changes on this forked version.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
board/congatec/cgtqmx6eval/README
board/congatec/cgtqmx6eval/cgtqmx6eval.c
include/configs/cgtqmx6eval.h

index b339cd0f5b1a7eab3b21ea94062375b84ee52e2f..1d736dc3515194026d85f540c392c4b695b38f45 100644 (file)
@@ -25,13 +25,13 @@ host PC (/tftpboot , for example).
 
 => sf probe
 
-=> tftp SPL
+=> tftp 0x12000000 SPL
 
 => sf erase 0x0 0x10000
 
-=> sf write 0x12000000 0x400 0x10000
+=> sf write 0x12000000 0x400 0x100
 
-=> tftp u-boot.img
+=> tftp 0x12000000 u-boot.img
 
 => sf erase 0x10000 0x70000
 
index 6057da67086ac83e2fd995bf5bf4c39454388109..e7624209e8e9d3a047a8f7022bfe9fdd556e8a11 100644 (file)
@@ -985,8 +985,7 @@ static void conv_ascii(unsigned char *dst, unsigned char *src, int len)
        unsigned char *sptr = src;
        unsigned char *dptr = dst;
 
-       while (remain)
-       {
+       while (remain) {
                if (*sptr) {
                        *dptr = *sptr;
                        dptr++;
@@ -1016,8 +1015,7 @@ static bool is_2gb(void)
 
        /* Congatec Part Numbers 104 and 105 have 2GiB of RAM */
        conv_ascii(outbuf, data->pn, sizeof(data->pn));
-       if (!strcmp((const char *)outbuf, "016104") ||
-           !strcmp((const char *)outbuf, "016105"))
+       if (!memcmp(outbuf, "016104", 6) || !memcmp(outbuf, "016105", 6))
                return true;
        else
                return false;
@@ -1053,11 +1051,11 @@ static void spl_dram_init(int width)
                mx6dq_dram_iocfg(width, &mx6q_ddr_ioregs, &mx6q_grp_ioregs);
                mx6_dram_cfg(&sysinfo, &mx6q_mmcd_calib, &mem_ddr_2g);
        } else if (is_cpu_type(MXC_CPU_MX6SOLO)) {
-               sysinfo.walat = 1; // add additional write latency for Solo and DualLite
+               sysinfo.walat = 1;
                mx6sdl_dram_iocfg(width, &mx6dl_ddr_ioregs, &mx6sdl_grp_ioregs);
                mx6_dram_cfg(&sysinfo, &mx6s_mmcd_calib, &mem_ddr_4g);
        } else if (is_cpu_type(MXC_CPU_MX6DL)) {
-               sysinfo.walat = 1; // add additional write latency for Solo and DualLite
+               sysinfo.walat = 1;
                mx6sdl_dram_iocfg(width, &mx6dl_ddr_ioregs, &mx6sdl_grp_ioregs);
                mx6_dram_cfg(&sysinfo, &mx6dl_mmcd_calib, &mem_ddr_2g);
        }
index c7131f155be446691ee343d8e8a21d61230bf1df..487c011cc2de09a1f82046198d489a9e75f49a90 100644 (file)
@@ -31,6 +31,7 @@
 #define CONFIG_SYS_MALLOC_LEN          (10 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_MXC_UART