]> code.ossystems Code Review - openembedded-core.git/commitdiff
meson: Add risc-v to known architectures
authorKhem Raj <raj.khem@gmail.com>
Thu, 2 Aug 2018 18:39:20 +0000 (11:39 -0700)
committerRichard Purdie <richard.purdie@linuxfoundation.org>
Tue, 7 Aug 2018 11:12:55 +0000 (12:12 +0100)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
meta/recipes-devtools/meson/meson.inc
meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch [new file with mode: 0644]

index b278d33b72e7874124b0ea3fa822da594defd7a2..a650469e9354e2bcd9c7f5327631fbabae877980 100644 (file)
@@ -12,6 +12,7 @@ SRC_URI = "https://github.com/mesonbuild/meson/releases/download/${PV}/meson-${P
            file://0004-Prettifying-some-output-with-pathlib.patch \
            file://0005-Set-the-meson-command-to-use-when-we-know-what-it-is.patch \
            file://validate-cpu.patch \
+           file://0001-mesonbuild-Recognise-risc-v-architecture.patch \
            "
 
 SRC_URI[md5sum] = "1698f6526574839de5dcdc45e3f7d582"
diff --git a/meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch b/meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch
new file mode 100644 (file)
index 0000000..a983bd7
--- /dev/null
@@ -0,0 +1,27 @@
+From 85bb96909d2024769d8e758538a7e8e2004dbb4d Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sat, 14 Jul 2018 13:03:39 -0700
+Subject: [PATCH] mesonbuild: Recognise risc-v architecture
+
+Upstream-Status: Backport [https://github.com/mesonbuild/meson/commit/6fafbad6d5ba591075a72e4726af647cece7020d]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ mesonbuild/environment.py | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/mesonbuild/environment.py b/mesonbuild/environment.py
+index a0580a21..b2041424 100644
+--- a/mesonbuild/environment.py
++++ b/mesonbuild/environment.py
+@@ -83,6 +83,8 @@ known_cpu_families = (
+     'ppc',
+     'ppc64',
+     'ppc64le',
++    'riscv32',
++    'riscv64',
+     'sparc64',
+     'x86',
+     'x86_64'
+-- 
+2.18.0
+