]> code.ossystems Code Review - openembedded-core.git/commitdiff
microblaze: Adjust Linux items from microblazeeb to microblaze
authorMark Hatle <mark.hatle@kernel.crashing.org>
Tue, 4 Feb 2020 21:06:30 +0000 (15:06 -0600)
committerRichard Purdie <richard.purdie@linuxfoundation.org>
Thu, 6 Feb 2020 12:16:02 +0000 (12:16 +0000)
Due to recent changes to the tune, in order to match config.guess, the name
of the big-endian microblaze architecture was changes to 'microblaze'.

Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
meta/classes/meson.bbclass
meta/classes/siteinfo.bbclass
meta/lib/oe/elf.py
meta/recipes-extended/ghostscript/ghostscript/microblaze/objarch.h [moved from meta/recipes-extended/ghostscript/ghostscript/microblazeeb/objarch.h with 100% similarity]

index 001602bd048dd7ac9e2a65ae0995d41caeb21321..06034e8b4731010546db79bae7bc14184017e6be 100644 (file)
@@ -57,7 +57,7 @@ def meson_cpu_family(var, d):
         return 'mips64'
     elif re.match(r"i[3-6]86", arch):
         return "x86"
-    elif arch == "microblazeel" or arch == "microblazeeb":
+    elif arch == "microblazeel":
         return "microblaze"
     else:
         return arch
index d62aaac0f07afb2de01901fc3fe766761b77b852..1a048c053f7c604b1066dd551e33ab4f729a5abc 100644 (file)
@@ -35,7 +35,6 @@ def siteinfo_data_for_machine(arch, os, d):
         "lm32": "endian-big bit-32",
         "m68k": "endian-big bit-32",
         "microblaze": "endian-big bit-32 microblaze-common",
-        "microblazeeb": "endian-big bit-32 microblaze-common",
         "microblazeel": "endian-little bit-32 microblaze-common",
         "mips": "endian-big bit-32 mips-common",
         "mips64": "endian-big bit-64 mips-common",
@@ -89,8 +88,6 @@ def siteinfo_data_for_machine(arch, os, d):
         "arm-linux-musleabi": "arm-linux",
         "armeb-linux-gnueabi": "armeb-linux",
         "armeb-linux-musleabi": "armeb-linux",
-        "microblazeeb-linux" : "microblaze-linux",
-        "microblazeeb-linux-musl" : "microblaze-linux",
         "microblazeel-linux" : "microblaze-linux",
         "microblazeel-linux-musl" : "microblaze-linux",
         "mips-linux-musl": "mips-linux",
index 2ed614f6521e5a1434536e60f4c2d282176de439..df0a4593fadb5bc49c266e4bb1ddbfcfafa25276 100644 (file)
@@ -22,7 +22,6 @@ def machine_dict(d):
                         "mips":       ( 8,     0,    0,          False,         32),
                         "mipsel":     ( 8,     0,    0,          True,          32),
                         "microblaze":  (189,   0,    0,          False,         32),
-                        "microblazeeb":(189,   0,    0,          False,         32),
                         "microblazeel":(189,   0,    0,          True,          32),
                         "powerpc":    (20,     0,    0,          False,         32),
                         "riscv32":    (243,    0,    0,          True,          32),
@@ -60,7 +59,6 @@ def machine_dict(d):
                         "sh4":        (42,     0,    0,          True,          32),
                         "sparc":      ( 2,     0,    0,          False,         32),
                         "microblaze":  (189,   0,    0,          False,         32),
-                        "microblazeeb":(189,   0,    0,          False,         32),
                         "microblazeel":(189,   0,    0,          True,          32),
                       },
             "linux-musl" : { 
@@ -81,7 +79,6 @@ def machine_dict(d):
                         "mips64":     (   8,     0,    0,          False,         64),
                         "mips64el":   (   8,     0,    0,          True,          64),
                         "microblaze":  (189,     0,    0,          False,         32),
-                        "microblazeeb":(189,     0,    0,          False,         32),
                         "microblazeel":(189,     0,    0,          True,          32),
                         "riscv32":    (243,      0,    0,          True,          32),
                         "riscv64":    (243,      0,    0,          True,          64),