mx6: imx-regs: Provide a structure for GPC registers

Introduce a structure for accessing the General Power Controller block (GPC)
registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index d4ce8a8733083bd80bc7b74b6cc35495c2b23a22..f12a046c55a284b5ca045f045c72da75a6490761 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -406,6 +406,19 @@ struct iomuxc {
        u32 gpr[14];
 };
 
+struct gpc {
+       u32     cntr;
+       u32     pgr;
+       u32     imr1;
+       u32     imr2;
+       u32     imr3;
+       u32     imr4;
+       u32     isr1;
+       u32     isr2;
+       u32     isr3;
+       u32     isr4;
+};
+
 #define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET           20
 #define IOMUXC_GPR2_COUNTER_RESET_VAL_MASK             (3<<IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET)
 #define IOMUXC_GPR2_LVDS_CLK_SHIFT_OFFSET              16