]> code.ossystems Code Review - meta-freescale.git/commitdiff
linux-imx (2.6.35.3): mx5: Fix IPU hang when framebuffer is enabled in U-boot
authorOtavio Salvador <otavio@ossystems.com.br>
Tue, 18 Sep 2012 15:26:02 +0000 (12:26 -0300)
committerOtavio Salvador <otavio@ossystems.com.br>
Tue, 18 Sep 2012 15:26:02 +0000 (12:26 -0300)
If bootloader enableds framebuffer, it is necessary to turn off IPU early in
the boot process to avoid kernel hang.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
meta-fsl-arm/recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch [new file with mode: 0644]
meta-fsl-arm/recipes-kernel/linux/linux-imx_2.6.35.3.bb

diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch
new file mode 100644 (file)
index 0000000..fa94faf
--- /dev/null
@@ -0,0 +1,59 @@
+From 3bd0148cfe28a9908ff4cbb7b542d309107591a4 Mon Sep 17 00:00:00 2001
+From: Fabio Estevam <fabio.estevam@freescale.com>
+Date: Wed, 5 Sep 2012 19:54:54 -0300
+Subject: [PATCH 1/2] ARM: mach-mx5: Fix IPU hang when framebuffer is enabled
+ in U-boot
+
+If bootloader enableds framebuffer, it is necessary to turn off IPU early in
+the boot process to avoid kernel hang.
+
+Suggested-by: Troy Kisky <troy.kisky@boundarydevices.com>
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+---
+ arch/arm/mach-mx5/clock.c |   16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c
+index 4559876..4d5a2cc 100644
+--- a/arch/arm/mach-mx5/clock.c
++++ b/arch/arm/mach-mx5/clock.c
+@@ -4453,6 +4453,20 @@ static void clk_tree_init(void)
+       }
+ }
++#define IPU_CONF               0x000
++#define IPU_DISP_GEN           0x0C4
++
++void turn_off_display(int physical_base)
++{
++      void __iomem *ipuc = ioremap(physical_base, SZ_4K);
++      if (ipuc) {
++              /* clear DI0/DI1 counter release */
++              unsigned reg = __raw_readl(ipuc + IPU_DISP_GEN);
++              __raw_writel(reg & ~(3 << 24), ipuc + IPU_DISP_GEN);
++              __raw_writel(0, ipuc + IPU_CONF);
++              iounmap(ipuc);
++      }
++}
+ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2)
+ {
+@@ -4462,6 +4476,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long
+       int wp_cnt = 0;
+       u32 pll1_rate;
++      turn_off_display(MX51_IPU_CTRL_BASE_ADDR + ((512 - 32) << 20));
+       pll1_base = ioremap(PLL1_BASE_ADDR, SZ_4K);
+       pll2_base = ioremap(PLL2_BASE_ADDR, SZ_4K);
+       pll3_base = ioremap(PLL3_BASE_ADDR, SZ_4K);
+@@ -4782,6 +4797,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long
+       int i = 0, j = 0, reg;
+       u32 pll1_rate;
++      turn_off_display(MX53_IPU_CTRL_BASE_ADDR + ((128 - 32) << 20));
+       pll1_base = ioremap(MX53_BASE_ADDR(PLL1_BASE_ADDR), SZ_4K);
+       pll2_base = ioremap(MX53_BASE_ADDR(PLL2_BASE_ADDR), SZ_4K);
+       pll3_base = ioremap(MX53_BASE_ADDR(PLL3_BASE_ADDR), SZ_4K);
+-- 
+1.7.10.4
+
index 7127d1abf9924c24d9696867a4e77c6d049e9436..68cc49ff8093e27ddb01db0b5d95e7d960b6a2be 100644 (file)
@@ -1,7 +1,7 @@
 # Copyright (C) 2011-2012 Freescale Semiconductor
 # Released under the MIT license (see COPYING.MIT for the terms)
 
-PR = "${INC_PR}.9"
+PR = "${INC_PR}.10"
 
 include linux-imx.inc
 
@@ -25,6 +25,7 @@ SRC_URI_append_mxs = " \
 "
 
 SRC_URI_append_mx5 = " \
+           file://mx5-fix-hang-with-framebuffer.patch \
            file://egalax_ts-enable-single-event-support.patch \
            file://0001-mx53_loco-add-USR-led-support.patch \
 "