]> code.ossystems Code Review - openembedded-core.git/commitdiff
tune-riscv: Drop littleendian and introduce bigendian tune
authorKhem Raj <raj.khem@gmail.com>
Sat, 31 Aug 2019 05:23:12 +0000 (22:23 -0700)
committerRichard Purdie <richard.purdie@linuxfoundation.org>
Sun, 1 Sep 2019 21:37:48 +0000 (22:37 +0100)
Default riscv is little-endian moreover most of other arches define
bigendian as tune and treats absense as litteendian, this make risc-v
fall in line

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
meta/conf/machine/include/riscv/tune-riscv.inc

index 1e3a1081e0de6af6bdb86690c21d62be4c219454..25d0463492de87b5c9cbc9b999d4e858981847fe 100644 (file)
@@ -3,16 +3,16 @@ require conf/machine/include/riscv/arch-riscv.inc
 TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations"
 TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations"
 
-TUNEVALID[littleendian] = "Little endian mode"
+TUNEVALID[bigendian] = "Big endian mode"
 
 AVAILTUNES += "riscv64 riscv32"
 
-TUNE_FEATURES_tune-riscv64 = "riscv64 littleendian"
+TUNE_FEATURES_tune-riscv64 = "riscv64"
 TUNE_ARCH_tune-riscv64 = "riscv64"
 TUNE_PKGARCH_tune-riscv64 = "riscv64"
 PACKAGE_EXTRA_ARCHS_tune-riscv64 = "riscv64"
 
-TUNE_FEATURES_tune-riscv32 = "riscv32 littleendian"
+TUNE_FEATURES_tune-riscv32 = "riscv32"
 TUNE_ARCH_tune-riscv32 = "riscv32"
 TUNE_PKGARCH_tune-riscv32 = "riscv32"
 PACKAGE_EXTRA_ARCHS_tune-riscv32 = "riscv32"