]> code.ossystems Code Review - openembedded-core.git/commitdiff
site: Add riscv32 and riscv64
authorKhem Raj <raj.khem@gmail.com>
Fri, 6 Oct 2017 00:50:40 +0000 (17:50 -0700)
committerRichard Purdie <richard.purdie@linuxfoundation.org>
Sun, 5 Nov 2017 13:44:55 +0000 (13:44 +0000)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
meta/site/riscv32-linux [new file with mode: 0644]
meta/site/riscv64-linux [new file with mode: 0644]

diff --git a/meta/site/riscv32-linux b/meta/site/riscv32-linux
new file mode 100644 (file)
index 0000000..a496bd1
--- /dev/null
@@ -0,0 +1,4 @@
+# glib-2.0
+glib_cv_stack_grows=${glib_cv_stack_grows=no}
+glib_cv_uscore=${glib_cv_uscore=no}
+
diff --git a/meta/site/riscv64-linux b/meta/site/riscv64-linux
new file mode 100644 (file)
index 0000000..a496bd1
--- /dev/null
@@ -0,0 +1,4 @@
+# glib-2.0
+glib_cv_stack_grows=${glib_cv_stack_grows=no}
+glib_cv_uscore=${glib_cv_uscore=no}
+