From: Otavio Salvador Date: Mon, 31 Oct 2016 18:20:04 +0000 (-0200) Subject: Merge remote-tracking branch 'origin/master' into 2016.11+fslc X-Git-Url: https://code.ossystems.io/gitweb?a=commitdiff_plain;h=0dc41492dc78f079c290059de72aea85c8f9b0af;p=bsp%2Fu-boot.git Merge remote-tracking branch 'origin/master' into 2016.11+fslc * origin/master: (116 commits) sunxi: Add support for Cubieboard4 tools: add mksunxiboot to tools-all target sunxi: Enable SPL support for A80 Optimus board sunxi: A64: enable USB support sunxi: Add default zq value for sun9i (A80) sunxi: Update DRAM clock for Olimex A20 boards sunxi: Add support for SID e-fuses on sun9i sunxi: dts: Pine64: add Ethernet alias sunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80) sunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT defines sunxi: add MMC pinmux setup for SDC2 on sun9i sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI sunxi: enable SPL for sun9i sunxi: add initial clock setup for sun9i for SPL sunxi: Enable SMP mode for the boot CPU on sun9i (A80) sunxi: add gtbus-initialisation for sun9i sunxi: DRAM initialisation for sun9i drivers: USB: OHCI: allow compilation for 64-bit targets configs/chromebox_panther_defconfig: Re-enable CONFIG_DM_PCI MAINTAINERS: Update Jagan's email ... Signed-off-by: Otavio Salvador --- 0dc41492dc78f079c290059de72aea85c8f9b0af diff --cc include/configs/mx6sabresd.h index c05f76ea3b,10c229dcb3..3bc2b82640 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@@ -20,11 -21,19 +21,22 @@@ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#define VIDEO_ARGS "${video_args}" +#define VIDEO_ARGS_SCRIPT "run video_args_script; " + #include "mx6sabre_common.h" + /* Falcon Mode */ + #define CONFIG_CMD_SPL + #define CONFIG_SPL_OS_BOOT + #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 + #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + + /* Falcon Mode - MMC support: args@1MB kernel@2MB */ + #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ + #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) + #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ + #define CONFIG_SYS_FSL_USDHC_NUM 3 #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */