From: Khem Raj Date: Fri, 6 Oct 2017 00:50:42 +0000 (-0700) Subject: siteinfo: Define data for riscv32 and riscv64 X-Git-Tag: uninative-1.8~1323 X-Git-Url: https://code.ossystems.io/gitweb?a=commitdiff_plain;h=603bcb3e2bb4e9f641a935aaccd56a393379bad9;p=openembedded-core.git siteinfo: Define data for riscv32 and riscv64 Signed-off-by: Khem Raj Signed-off-by: Ross Burton --- diff --git a/meta/classes/siteinfo.bbclass b/meta/classes/siteinfo.bbclass index 1aada40695..29cd2aa82b 100644 --- a/meta/classes/siteinfo.bbclass +++ b/meta/classes/siteinfo.bbclass @@ -47,6 +47,8 @@ def siteinfo_data(d): "ppc": "endian-big bit-32 powerpc-common", "ppc64": "endian-big bit-64 powerpc-common", "ppc64le" : "endian-little bit-64 powerpc-common", + "riscv32": "endian-little bit-32 riscv-common", + "riscv64": "endian-little bit-64 riscv-common", "sh3": "endian-little bit-32 sh-common", "sh4": "endian-little bit-32 sh-common", "sparc": "endian-big bit-32", @@ -95,6 +97,10 @@ def siteinfo_data(d): "powerpc64-linux-muslspe": "powerpc-linux powerpc64-linux", "powerpc64-linux": "powerpc-linux", "powerpc64-linux-musl": "powerpc-linux", + "riscv32-linux": "riscv32-linux", + "riscv32-linux-musl": "riscv32-linux", + "riscv64-linux": "riscv64-linux", + "riscv64-linux-musl": "riscv64-linux", "x86_64-cygwin": "bit-64", "x86_64-darwin": "bit-64", "x86_64-darwin9": "bit-64",