Peng Fan [Thu, 15 Oct 2015 10:05:59 +0000 (18:05 +0800)]
imx: mx6sabresd: add i.MX6DQP Sabresd support
Add i.MX6DQP-Sabresd board support:
1. set fdt_file according to board_rev which is set at runtime.
2. Add mx6dqp_ddr_ioregs and calibration value for this board.
arm, imx6, aristainetos2: set gpr register after reset
setting the gpr 1,8 and 12 registers to a fix value.
This is needed because after a WDT reset, this registers
are not correct resettet, and prevent linux from booting
again.
Peng Fan [Wed, 26 Aug 2015 07:40:58 +0000 (15:40 +0800)]
imx-common: timer: clean up code
We can reuse common functions in lib/time.c, but not reimplement
functions in imx-common/time.c.
Only keep timer_init ,get_tbclk and implement timer_read_counter in
imx-common/time.c.
Sjoerd Simons [Fri, 28 Aug 2015 13:01:54 +0000 (15:01 +0200)]
config_distro_bootcmd.h: Use a private variable for bootpart
Hush has an oddity where using ${var} causes var to resolved in the the global
address space (iotw the environment) first and only afterwards will the local
variable space be searched.
This causes odd side-effects when iterating over the boot partitions
using ${bootpart} if the environment also has a bootpart variable (e.g. for
the various TI boards). Fix this by using the hopefully more unique
${distro_bootpart} instead of ${bootpart}.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Maxime Ripard [Thu, 15 Oct 2015 20:04:04 +0000 (22:04 +0200)]
fastboot: Implement OEM format only when we have MMC support
The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
that we have an MMC in our system, which might not be the case if we have
some other storage device.
Change the configuration option protecting that call to
FASTBOOT_FLASH_MMC_DEV, that makes much more sense.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Otavio Salvador [Wed, 21 Oct 2015 01:18:30 +0000 (23:18 -0200)]
Merge tag 'v2015.10' into 2015.10+fslc
Prepare v2015.10
* tag 'v2015.10': (38 commits)
Prepare v2015.10
powerpc: Drop old non-generic-board code
sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARD
sbc8641d: increase monitor size from 256k to 384k
sbc8641d: add basic flash setup instructions to README file
sbc8641d: set proper environment sector size.
sbc8641d: increase malloc pool size to a sane default
sbc8641d: enable command line editing
image-fit: Fix signature checking
igep00x0: Use BCH8 ECC
vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.
vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.
dfu: dfu_sf: Take the start address into account
dfu: dfu_sf: Use the erase sector size for erase operations
doc/README.scrapyard: Add more entries
Revert "arm: Remove inetspace_v2_cmc board"
Revert "arm: Remove d2net_v2 defconfig file"
doc/README.scrapyard: Populate recent removals
ARM: rpi: add another revision of Raspberry Pi A+
ARM: dockstar: move start of environment area
...
Paul Gortmaker [Sat, 17 Oct 2015 20:40:31 +0000 (16:40 -0400)]
sbc8641d: increase monitor size from 256k to 384k
Between v2015.07-rc1 and v2015.07-rc2 this board started
silent boot failure. A bisect led to commit 6eed3786c68c8a49d
("net: Move the CMD_NET config to defconfigs"). This commit
looks harmless in itself, but it did implicitly add a feature
to the image which led to this:
u-boot$ls -l ../41*/u-boot.bin
-rwxrwxr-x 1 paul paul 261476 Oct 16 16:47 ../411/u-boot.bin
-rwxrwxr-x 1 paul paul 266392 Oct 16 16:43 ../412/u-boot.bin
u-boot$bc
bc 1.06.95
Copyright 1991-1994, 1997, 1998, 2000, 2004, 2006 Free Software Foundation, Inc.
This is free software with ABSOLUTELY NO WARRANTY.
For details type `warranty'.
256*1024
262144
i.e. we finally broke through the 256k monitor size. Jump it
up to 384k and fix the hard coded value used in the env offset
at the same time.
We were probably flirting with the 256k size issue without
knowing it when testing on different baselines in earlier
commits, but since this is all board specific, a rebase or
reorder to put this commit 1st is of little value.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Paul Gortmaker [Sat, 17 Oct 2015 20:40:28 +0000 (16:40 -0400)]
sbc8641d: set proper environment sector size.
When debugging an env fail due to too small a malloc pool, it
was noted that the env write was 256k. But the device sector
size is 1/2 that, as can be seen from "fli" output:
Paul Gortmaker [Sat, 17 Oct 2015 20:40:27 +0000 (16:40 -0400)]
sbc8641d: increase malloc pool size to a sane default
Currently the board fails to save its env, since the env size
is much smaller than the sector size, and the malloc fails for
the pad buffer, giving the user visible symptom of:
Unable to save the rest of sector (253952)
Allow for 1M malloc pool, the same as used on the sbc8548 board.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able to enumerate the bus. Add
support code here that enables the host bridge, trains the links and
sets up the Address Translation Tables.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
[trini: Always declare vexpress64_pcie_init and continue handling logic
inside the function] Signed-off-by: Tom Rini <trini@konsulko.com>
The dfu_alt_info_spl variable allows passing a starting point
for the binary to be flashed in the SPI NOR.
For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means
that we want to flash the binary starting at address 0x400.
In order to do so we need to erase the entire sector and write to
the the subsequent SPI NOR sectors taking such start address
into account for the address calculations.
Tested by succesfully writing SPL binary into 0x400 offset and
the u-boot.img at offset 64 kiB of a SPL NOR.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Use lldiv for the math] Signed-off-by: Tom Rini <trini@konsulko.com>
dfu: dfu_sf: Use the erase sector size for erase operations
SPI NOR flashes need to erase the entire sector size and we cannot pass
any arbitrary length for the erase operation.
To illustrate the problem:
Copying data from PC to DFU device
Download [=========================] 100% 478208 bytes
Download done.
state(7) = dfuMANIFEST, status(0) = No error condition is present
state(10) = dfuERROR, status(14) = Something went wrong, but the
device does not know what it was
Done!
In this case, the binary has 478208 bytes and the M25P32 SPI NOR
has an erase sector of 64kB.
478208 = 7 entire sectors of 64kiB + 19456 bytes.
Erasing the first seven 64 kB sectors works fine, but when trying
to erase the remainding 19456 causes problem and the board hangs.
Fix the issue by always erasing with the erase sector size.
Tom Rini [Mon, 19 Oct 2015 15:20:54 +0000 (11:20 -0400)]
Revert "arm: Remove d2net_v2 defconfig file"
Upon further review when populating README.scrapyard, d2net_v2 is a
variant on net2big_v2 and not just an orphan config. To help in the
future also add this to board/LaCie/net2big_v2/MAINTAINERS which needed
a little consolidation anyhow.
Lubomir Rintel [Wed, 14 Oct 2015 15:17:54 +0000 (17:17 +0200)]
ARM: rpi: add another revision of Raspberry Pi A+
Seen this one in the wild. Is labelled "Raspberry Pi Model A+ V1.1,
(C) Raspberry Pi 2014". A standard A+ board, much like the one with
version 0x12, didn't notice any differencies.
Eric Cooper [Mon, 12 Oct 2015 23:18:52 +0000 (19:18 -0400)]
ARM: dockstar: move start of environment area
The default dockstar configuration for U-Boot currently causes it to
overrun the environment area, so that a "saveenv" command bricks the
device. This patch moves the environment to a higher address to avoid
that.
Lokesh Vutla [Thu, 8 Oct 2015 06:01:47 +0000 (11:31 +0530)]
ARM: k2e/l: Apply WA for selecting PA clock source
On keystone2 Lamarr and Edison platforms, the PA clocksource
mux in PLL REG1, can be changed only after enabling its clock
domain.
So selecting the output of PASS PLL as input to PA only after
enabling the clockdomain.
This is as per the debug done by "Vitaly Andrianov <vitalya@ti.com>"
and based on the previous work done by "Hao Zhang <hzhang@ti.com>"
Tom Rini [Sat, 17 Oct 2015 12:04:11 +0000 (08:04 -0400)]
arch/powerpc/config.mk: Pass -fno-ira-hoist-pressure when possible
There are various toolchain issues that cause us to produce invalid
binaries with certain gcc 4.8.x and 4.9.x versions when we don't pass
this flag in.
Tested-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: Tom Rini <trini@konsulko.com>
Dinh Nguyen [Thu, 15 Oct 2015 15:13:36 +0000 (10:13 -0500)]
arm: socfpga: enable data/inst prefetch and shared override in the L2
Update the L2 AUX CTRL settings for the SoCFPGA.
Enabling D and I prefetch bits helps improve SDRAM performance on the
platform.
Also, we need to enable bit 22 of the L2. By not having bit 22 set in the
PL310 Auxiliary Control register (shared attribute override enable) has the
side effect of transforming Normal Shared Non-cacheable reads into Cacheable
no-allocate reads.
Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.
Anthony Felice [Fri, 9 Oct 2015 20:38:39 +0000 (16:38 -0400)]
vf610twr: Fix typo in DRAM init
This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).
Signed-off-by: Anthony Felice <tony.felice@timesys.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Thierry Reding [Thu, 20 Aug 2015 09:52:15 +0000 (11:52 +0200)]
armv8/gic: Fix GIC v2 initialization
Initialize all GICD_IGROUPRn registers and set up GICC_CTLR to enable
interrupts to the primary CPU. This fixes issues seen after booting a
Linux kernel from U-Boot.
Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Stefan Agner [Wed, 14 Oct 2015 17:58:43 +0000 (10:58 -0700)]
arm: vf610twr: improve memory layout
Currently, the device tree relocation is disabled, likely to
keep some DDR3 RAM at the end for Cortex-M4 firmwares. This
can be archived using bootm_size, which limits the image
processing range of the boot commands.
Move the device tree standard load address to a higher address
which aligns better with what we are doing on other boards.
Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Stefan Agner [Wed, 14 Oct 2015 05:11:42 +0000 (22:11 -0700)]
mtd: nand: vf610_nfc: resync with upstream Linux version
This resyncs the driver changes with the Linux version of the
driver. The driver received some feedback in the LKML and got
recently acceppted, the latest version can be found here:
https://lkml.org/lkml/2015/9/2/678
Notable changes are:
- On ECC error, reread OOB and count bit flips in OOB too.
If flipped bits are below threshold, also return an empty
OOB buffer.
- Return the amount of bit flips in vf610_nfc_read_page.
- Use endianness aware vf610_nfc_read to read ECC status.
- Do not enable IDLE IRQ (since we do not operate with an
interrupt service routine).
- Use type safe struct for buffer variants (vf610_nfc_alt_buf).
- Renamed variables in struct vf610_nfc (column and page_sz)
to reflect better what they really representing.
The U-Boot version currently does not support RAW NAND write
when using the HW ECC engine.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Tested-by: Stefan Agner <stefan@agner.ch> Acked-by: Scott Wood <scottwood@freescale.com>
Fabio Estevam [Sat, 3 Oct 2015 17:21:00 +0000 (14:21 -0300)]
ls102xa: Fix reset hang
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings")
issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as
it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c.
Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only
revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that
is specific for ls102x, which accesses the watchdog WCR register in big-endian
format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x
in the 2015.10 release. The proper fix is to make the watchdog driver
endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman <sinan@writeme.com> Tested-by: Sinan Akman <sinan@writeme.com> Reviewed-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Ludger Dreier [Mon, 12 Oct 2015 11:34:24 +0000 (13:34 +0200)]
env_eeprom.c: Correct using saved environment
The changes in ed6a5d4 unintentionally broke support for reading the
environment saved to eeprom back. To correct this the crc-check and
decision on which environment to use is now moved to env_relocate_spec.
This is done for both the "redundant env" and the "single env" case.
MTD partitioning in current pcm052 configuration is inconsistent.
Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and
CONFIG_ENV_OFFSET[_REDUND].
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Tom Rini [Sun, 11 Oct 2015 20:48:36 +0000 (16:48 -0400)]
test/fs/fs-test.sh: Update expected results and TC10 logic
With the changes in 7a3e70c we now get read(2) behavior so trying to
read 2MB with 1MB left in the file results in 1MB read and a warning.
We update the test logic here to make sure we read back 1MB as expected.
This change however changes the overall summary as while EXT4 continues
to not have offset support the test now fails when expected to pass
rather than fails when expected to fail (and we report that as pass).
Execution branches on feedback mode are swapped, this has no effect
if default direct mode is on (then p_div is equal to 1 and Fout equals
to Fcco), that's why the problem remained unnoticed for a long time.
lpc32xx: remove surplus clock cycle in PL175 WAIT_OEN config
According to ARM PrimeCell PL175 documentation WAIT_OEN config value
is defined without any additional clocks added to the value set by a
client, the change fixes the wrong interface to WAIT_OEN config.
The change also touches a single user of LPC32xx EMC and corrects
configured "output enable delay" value on its side according to the
changed interface.
Fix variation in timestamps caused by timezone differences.
When building with SOURCE_DATE_EPOCH set, avoid use of mktime in
default_image.c, which converts the timestamp into localtime. This
causes variation based on timezone when building u-boot.img and
u-boot-sunxi-with-spl.bin targets.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Tested-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Paul Kocialkowski <contact@paulk.fr>
Tom Rini [Thu, 27 Aug 2015 19:42:41 +0000 (15:42 -0400)]
common/image.c: Make boot_get_ramdisk() perform a check for Android images
In 2dd4632 the check for where a ramdisk is found on an Android image
was got moved into the "normal" loop here, causing people to have to
pass the kernel address in the ramdisk address location in order to have
Android boot still. This changed previous behavior so perform a check
early in the function to see if we have an Android image and if so use
that as where to look for the ramdisk (which is what the rest of the
code here expects). We allow for this to still be overridden with an
explicit ramdisk address to be passed as normal.
Cc: Rob Herring <robh@kernel.org> Reported-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tom Rini <trini@konsulko.com>
Ian Campbell [Tue, 29 Sep 2015 09:27:09 +0000 (10:27 +0100)]
arndale: Apply Cortex-A15 errata #773022 and #774769
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.
However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.
Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.
This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.
The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.
Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.
I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.
Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Rob Herring [Mon, 5 Oct 2015 19:37:07 +0000 (14:37 -0500)]
image: fix support for Android boot images with no ramdisk
If an Android boot image does not contain a ramdisk, make sure rd_len
and rd_data are returned to indicate no ramdisk rather than just relying
on returning an error.
