Tim Harvey [Fri, 8 Aug 2014 05:57:29 +0000 (22:57 -0700)]
pci: mx6: fix occasional link failures
According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.
Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Marek Vasut [Sun, 3 Aug 2014 23:47:10 +0000 (01:47 +0200)]
ARM: mx6: Handle the MMDCx_MDCTL COL field caprices
The COL field value cannot be easily calculated from the desired
column number. Instead, there are special cases for that, see the
datasheet, MMDCx_MDCTL field description, field COL . Cater for
those special cases.
Marek Vasut [Sun, 3 Aug 2014 23:47:09 +0000 (01:47 +0200)]
ARM: mx6: Prevent overflow in DRAM size detection
The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.
Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of
register CCM_CIMR corresponds to bit 19 so fix its definition accordingly.
Fabio Estevam [Fri, 1 Aug 2014 11:50:00 +0000 (08:50 -0300)]
mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offset
According to the Reference Manual the 'spdif0_clk_podf' field of register
CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset
definitions accordingly.
Marek Vasut [Fri, 25 Jul 2014 15:23:35 +0000 (17:23 +0200)]
arm: m53evk: Fix RTC bus number
A previous update to the I2C stack introduced a typo in the
configuration option. Fix the typo and therefore allow the
RTC to work correctly with the 'date' command again.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Jeroen Hofstee [Tue, 17 Jun 2014 20:47:31 +0000 (22:47 +0200)]
mtd: cfi_flash: fix clang warning
clang warns this check is silly; it is since s is
a local variable.
u-boot/drivers/mtd/cfi_flash.c:2363:13: warning: comparison of
array 's' not equal to a null pointer is always true
else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
cc: Stefan Roese <sr@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Markus Niebel [Fri, 18 Jul 2014 14:52:44 +0000 (16:52 +0200)]
Add TQ Systems TQMa6 board support
This patch adds the changes to boards.cfg and the board directory
under board/tqc.
TQMa6 is a family of modules based on Freescale i.MX6. It consists of
TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3
TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3
The modules need a baseboard. Initially the MBa6x starterkit mainboard is
supported. To easy support for other mainboards the functionality is splitted
in one file for the module (tqma6.c) and one file for the baseboard (tqma6_
mba6).
The modules can be boot from eMMC (on USDHC3) and SPI flash.
The following features are supported:
- MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard)
- Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module.
The phy needs special configurations for the pad skew registers to adjust for
the signal routing.
Also support for standard ethernet commands and uppdate via tftp.
- SPI: ECSPI1 with bootable serial flash on module and two additional
chip selects on MBa6x
- I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3)
and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x
are also configured.
- USB: high speed host 1 on MBa6x and support for USB storage
- PMIC: support for pfuze 100 on TQMa6<x>
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
spi: add config option to enable the WP pin function on st micron flashes
enable the W#/Vpp signal to disable writing to the status
register on ST MICRON flashes like the N25Q128 thorugh
the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
add basic support for the pwm modul found on imx6.
Pieces of this code are based on linux code from drivers/pwm/pwm-imx.c
Commit "cd3de83f1476 Linux 3.16-rc4"
Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
There is no need to keep iomuxc_base_regs structure as it serves the exact same
purpose of the iomuxc structure, which is to provide access to the GPR
registers.
The additional fields of iomuxc_base_regs are not used. Other advantage of
'iomuxc' is that it has a shorter name and the variable declarations can fit
into a single line.
So remove iomuxc_base_regs structure and use iomuxc instead.
Pavel Machek [Sun, 13 Jul 2014 11:10:45 +0000 (13:10 +0200)]
socfpga: timer actually counts down
Timer on cyclone5 actually counts down. It took me a while to figure
out, as timer counting in wrong direction actually _can_ be used, it
just appears to tick at extremely high frequency in u-boot.
boards.cfg: keep it sorted filling the board field
The boards.cfg file has allowed to use "-" for the board (= 6th) field
if the board name is the same as the 7th field.
But I notice one problem.
Because tools/reformat.py sorts the lines in the simple alphabetical
order (= the order of character code), some entries for the same board
are not lined up together.
For example, "bf527-ezkit" and "bf527-ezkit-v2" share the same board.
But they are located separately because "bf527-ezkit" fills the board
field with "-" whereas "bf527-ezkit-v2" specifies it explicitely.
The similar things can be seen:
- between "trizepsive" and "polaris"
- between "RRvision" and "RRvision_LCD"
- between "korat" and "korat_perm"
- between "lwmon5" and "lcd4_lwmon5"
This commit was generated by the following command:
Eric Nelson [Wed, 9 Jul 2014 19:27:29 +0000 (12:27 -0700)]
i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10
The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.
These settings now match the i.MX6 Dual and Quad core versions.
Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Michal Simek [Wed, 9 Jul 2014 14:10:49 +0000 (16:10 +0200)]
doc: Add zynq fragment to git-mailrc file
This is a MIME GnuPG-signed message. If you see this text, it means that
your E-mail or Usenet software does not support MIME signed messages.
The Internet standard for MIME PGP messages, RFC 2015, was published in 1996.
To open this message correctly you will need to install E-mail or Usenet
software that supports modern Internet standards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fabio Estevam [Fri, 13 Jun 2014 04:42:37 +0000 (01:42 -0300)]
mx6: soc: Update the comments of set_ldo_voltage()
Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces
set_ldo_voltage() function that can be used to set the voltages
of any of the three LDO regulators controlled by the PMU_REG_CORE register.
Prior to this commit there was a single set_vddsoc() which only configured the
VDDSOC regulator.
Update the comments to align with the new set_ldo_voltage() implementation.
Marek Vasut [Thu, 26 Jun 2014 09:01:30 +0000 (11:01 +0200)]
ARM: m53evk: add needed commands and options
- "env ask", "env grep" and "setexpr" are needed for commissioning
- add support for ext4 file systems
- adjust default environment to use ext4 commands
- add write support for (V)FAT and EXT4
- add bitmap and splashscreen support
- print timestamp information for images
Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 26 Jun 2014 09:01:27 +0000 (11:01 +0200)]
ARM: m28evk: add needed commands and options
- "env ask", "env grep" and "setexpr" are needed for commissioning
- add support for ext4 file systems
- adjust default environment to use ext4 commands
- add write support for (V)FAT and EXT4
- add bitmap and splashscreen support
- print timestamp information for images
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Tyler Baker [Mon, 23 Jun 2014 18:11:29 +0000 (11:11 -0700)]
TI:omap3: enable CONFIG_CMD_DHCP for omap3_beagle
The following patch re-enables the dhcp functionality on omap3_beagle.
It was removed with df4dbb5df6ab1c1d27b3fd4acbaad69b47095daf when
omap3_beagle was converted to use ti_omap3_common.h. I have tested
beagleboard and beagleboard-xm with this patch and confirmed dhcp is
working.
Commit "2842c1c fit: add sha256 support" badly increased
memory footprint, so some of our boards did not build anymore.
Since monitor base must not be changed I removed some commands
to save memory.
Maybe making sha256 optional for fit would be an option for
the future since it really has some beefy footprint.
Vasili Galka [Mon, 30 Jun 2014 10:00:12 +0000 (13:00 +0300)]
blackfin: Add more dcache functions
Add invalidate_dcache_range() and flush_dcache_range() for the blackfin
architecture. Such functions already exist on this arch with different
names, so just forward the call.
This fixes the build of bf609-ezkit board as it uses
drivers/net/designware.c which requires the above functions.
Vasili Galka [Mon, 30 Jun 2014 09:59:41 +0000 (12:59 +0300)]
m68k: Fix incorrect memory access on M5235
The csarX and cscrX registers in the fbcs_t struct are 16-bit for
CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c
accessed them always as 32-bit, effectively creating a wrong memory
access on M5235. Fixed that by choosing out_be16/out_be32 depending
on whether CONFIG_M5235 is defined or not.
Cc: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
The option can be used to save the environment in spi flash.
Implementation code is already exist in command/env_sf.c. But
the documentation is missing.
This patch add the details for this option to the README file.
Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Wu, Josh [Tue, 24 Jun 2014 09:31:02 +0000 (17:31 +0800)]
env_fat: use get_device_and_partition() during env save and load
Use get_device_and_partition() is better since:
1. It will call the device initialize function internally. So we can
remove the mmc intialization code to save many lines.
2. It is used by fatls/fatload/fatwrite. So saveenv & load env should
use it too.
3. It can parse the "D:P", "D", "D:", "D:auto" string to get correct
device and partition information by run-time.
Also we remove the FAT_ENV_DEVICE and FAT_ENV_PART. We use a string:
FAT_ENV_DEVICE_AND_PART.
For at91sam9m10g45ek, it is "0". That means use device 0 and if:
a)device 0 has no partition table, use the whole device as a FAT file
system.
b)device 0 has partittion table, use the partition #1.
Refer to the commit: 10a37fd7a4 for details of device & partition string.
Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
am43xx: Update EMIF DDR3 Configuration for AM43x GP
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
Felipe Balbi [Thu, 26 Jun 2014 21:38:05 +0000 (16:38 -0500)]
board: ti: dra7xx: add mux data for UART3
J6 EVM can be built with UART3 as console, but currently
there's nothing muxing UART3 correctly. Likely this only
works because, based on commit log, author was only testing
with UART3 boot and - I assume - ROM code leave UART3 correctly
muxed in that case.
If we want to boot from MMC and still use UART3 as console,
then we need to mux those signals correctly.
Masahiro Yamada [Tue, 24 Jun 2014 13:10:52 +0000 (22:10 +0900)]
build: define CPU only when arch/${ARCH}/cpu/${CPU} exists
The directory arch/${ARCH}/cpu/${CPU} does not exist
in avr32, blackfin, microblaze, nios2, openrisc, sandbox, x86.
These architectures have only one CPU type.
Defining CPU should not be required for such architectures.
This commit allows cpu field (= the 3rd field of boards.cfg)
to be kept blank.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Jeroen Hofstee [Wed, 18 Jun 2014 19:22:35 +0000 (21:22 +0200)]
ARM: emif4: wait for CM_DLL_READYST to be set
The code intends for the CM_DLL_READYST to be set, but
actually polls till any bit is set since the logical
AND is used instead of the bitwise one is used. Fix it.
