Tim Harvey [Mon, 2 Jun 2014 23:13:27 +0000 (16:13 -0700)]
imx: ventana: switch to SPL
Switch to an SPL image. The SPL for Ventana does the following:
- setup i2c and read the factory programmed EEPROM to obtain DRAM config
and model for board-specific calibration data
- configure DRAM per CPU/size/layout/devices/calibration
- load u-boot.img from NAND and jump to it
This allows for a single SPL+u-boot.img to replace the previous multiple boa
configurations.
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 2 Jun 2014 23:13:26 +0000 (16:13 -0700)]
imx: ventana: auto-configure for IMX6Q vs IMX6DL
use the new iomux function and a macros to create a multi-dimensional array
of iomux values without duplicating the defintions.
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 2 Jun 2014 23:13:25 +0000 (16:13 -0700)]
imx: ventana: split read_eeprom into standalone file
Split the read_eeprom function out so that it can be shared (ie with SPL)
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 2 Jun 2014 23:13:24 +0000 (16:13 -0700)]
imx: iomux: add macros to setup iomux for multiple SoC types
Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list
and add macros for declaring the pad_list that take into account the
SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL
iomux).
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 2 Jun 2014 23:13:23 +0000 (16:13 -0700)]
mx6: add mmdc configuration for MX6Q/MX6DL
- add function for configuring iomux based on board-specific regs
- add function for configuring mmdc based on board-specific and
chip-specific data
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 2 Jun 2014 23:13:22 +0000 (16:13 -0700)]
mx6: add structs for mmdc and ddr iomux registers
Add memory-mapped structures for MMDC iomux and configuration. Note that whi
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux
registers differ. This requires two sets of structures.
Add structures to describe DDR3 device information, system information
(memory layout, etc), and MMDC calibration registers that can be used to
configure the MMDC dynamically.
We define these structures for SPL builds instead of including mx6q-ddr.h an
mx6dl-ddr.h which use the same namespace and are only useful for imximage cf
files.
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Tim Harvey [Mon, 2 Jun 2014 23:13:21 +0000 (16:13 -0700)]
imx: add comments and remove unused struct fields
Add comment block for the imx_ddr_size function and remove the extra unused
fields from struct esd_mmdc_regs which are also not common between IMX53 and
IMX6.
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Tim Harvey [Mon, 2 Jun 2014 23:13:20 +0000 (16:13 -0700)]
mx6: add boot device support for SPL
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Tim Harvey [Mon, 2 Jun 2014 23:13:19 +0000 (16:13 -0700)]
mx6: add common SPL configuration
Add a common header which can hopefully be shared amon imx6 SPL users
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Tim Harvey [Mon, 2 Jun 2014 23:13:18 +0000 (16:13 -0700)]
spl: nand: add support for mxs nand
This utilizes existing mxs_nand support layer to provide a method to load an
image off nand for SPL. The flash device will be detected in order to support
multiple flash devices instead of having layout hard coded at build time.
Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Wu, Josh [Wed, 4 Jun 2014 03:01:24 +0000 (11:01 +0800)]
fs: fatwrite: use map_sysmem before use file_fat_write
When the map_sysmem, then the fatwrite command can support sandbox.
Following command will show how to use it:
=> sb bind 0 sd.img
=> fatls host 0
=> fatwrite host 0 $memaddr filename $filesize
Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 5 Jun 2014 07:41:49 +0000 (16:41 +0900)]
tools: refactor HOSTLOADLIBES_* options
The tools mkimage, dumpimage, fit_info, fit_check_sign
always have the common libraries to be linked,
so HOSTLOADLIBES_* can be consolidated a little bit.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Mon, 2 Jun 2014 07:30:53 +0000 (16:30 +0900)]
boards.cfg: move many unmaintained boards to Orphan
Emails to the following addresses have been bouncing.
Albin Tonnerre <albin.tonnerre@free-electrons.com>
Anton Shurpin <shurpin.aa@niistt.ru>
Brent Kandetzki <brentk@teleco.com>
Dan Malek <dan@embeddedalley.com>
Frank Panno <fpanno@delphintech.com>
Gary Jennejohn <garyj@denx.de>
Hayden Fraser <Hayden.Fraser@freescale.com>
Eric Millbrandt <emillbrandt@dekaresearch.com>
Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Kumar Gala <kumar.gala@freescale.com>
Joe D'Abbraccio <ljd015@freescale.com>
John Zhan <zhanz@sinovee.com>
Keith Outwater <Keith_Outwater@mvis.com>
Julien May <julien.may@miromico.ch>
Kári Davíðsson <kd@flaga.is>
Kyle Moffett <Kyle.D.Moffett@boeing.com>
Leo Sartre <lsartre@adeneo-embedded.com>
Mike Dunn <mikedunn@newsguy.com>
Dave Ellis <DGE@sixnetio.com>
Chan-Taek Park <c-park@ti.com>
Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
I am Ccing the current working addresses for some of them.
If you want to get back an Orphan board to Active,
please update your email address.
Please do it only if you still have a real hardware to test on.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albin Tonnerre <albin.tonnerre@gmail.com> Cc: Anton Shurpin <anton.shurpin@gmail.com> Cc: Brent Kandetzki <brent.kandetzki@stw-technic.com> Cc: Dan Malek <dan.malek@konsulko.com> Cc: Gary Jennejohn <gljennjohn@googlemail.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@gmail.com> ? Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Mike Dunn <mikedunn@newsguy.com> CC: Jerry Van Baren <vanbaren@cideas.com>
Prevent a buffer overflow in mkimage when signing with SHA256
Due to the FIT_MAX_HASH_LEN constant not having been updated
to support SHA256 signatures one will always see a buffer
overflow in fit_image_process_hash when signing images that
use this larger hash. This is exposed by vboot_test.sh.
Signed-off-by: Michael van der Westhuizen <michael@smart-africa.com> Acked-by: Simon Glass <sjg@chromium.org>
[trini: Rework a bit so move the exportable parts of hash.h outside of
!USE_HOSTCC and only need that as a new include to image.h] Signed-off-by: Tom Rini <trini@ti.com>
Sandeep Singh [Thu, 5 Jun 2014 13:19:57 +0000 (18:49 +0530)]
powerpc/mpc85xx: Add workaround to enable TDM on T1040
This is a workaround for 32 bit hardware limitation of TDM.
T1040 has 36 bit physical addressing, TDM DMAC register
are 32 bit wide but need to store address of CCSR space
which lies beyond 32 bit address range. This workaround
creats a LAW to enable access of TDM DMA to CCSR by
mapping CCSR to overlap with DDR.
A hole of 16M is created in memory using device tree. This
workaround law is set only if "tdm" is defined in hwconfig.
Also disable POST tests and add LIODN for TDM
Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Shaveta Leekha [Wed, 28 May 2014 08:48:55 +0000 (14:18 +0530)]
powerpc/serdes: Add the workaround for erratum A-007186
SerDes PLL is calibrated at reset. When the junction temperature
delta from the time the PLL is calibrated exceeds +56C/-66C,
jitter may increase and can cause PLL to unlock.
This workaround overwrite the SerDes registers with new values,
to calibrate SerDes registers.
These values are known to work fine for all temperature ranges.
This workaround is valid for B4, T4 and T2 platforms, so
added in their config.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
[York Sun: replaced typedef ccsr_sfp_regs_t with struct ccsr_sfp_regs] Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Fri, 23 May 2014 20:15:00 +0000 (13:15 -0700)]
powerpc/mpc85xx: Add workaround for DDR erratum A004508
When the DDR controller is initialized below a junction temperature of
0°C and then operated above a junction temperature of 65°C, the DDR
controller may cause receive data errors, resulting ECC errors and/or
corrupted data. This erratum applies to the following SoCs and their
variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
P2020.
Chunhe Lan [Tue, 20 May 2014 05:34:28 +0000 (13:34 +0800)]
powerpc/t4rdb: Add alternate serdes protocols to align with A-007186
A-007186: SerDes PLL is calibrated at reset. It is possible
for jitter to increase and cause the PLL to unlock when the
temperature delta from the time the PLL is calibrated exceeds
+56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using
XnVDD of 1.5 V). No issues are seen with LC VCO. The protocols
only using Ring VCOs are impacted.
Workaround:
For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring
VCO, this need to use alternate serdes protocols. Alternate
option has the same functionality as the original option; the
only difference being LC VCO rather than Ring VCO.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Shaohui Xie [Fri, 16 May 2014 02:52:33 +0000 (10:52 +0800)]
powerpc/t4qds: Add alternate serdes protocols to align with A-007186
A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to
increase and cause the PLL to unlock when the temperature delta from the
time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V
(or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC
VCO. Only the protocols using Ring VCOs are impacted.
Workaround:
For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need
to use alternate serdes protocols. The alternate option has the same
functionality as the original option; the only difference being LC VCO
rather than Ring VCO.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Thu, 15 May 2014 11:24:11 +0000 (19:24 +0800)]
board/t208x: update t2080qds/t2080rdb for errata A-007186
As errata A-007186, we need to use the alternate serdes
protocol instead of those impacted protocols.
- add support for serdes protocols: 0x1b, 0x50, 0x5e,
0x64, 0x6a, 0xd2, 0x67, 0x70.
- update t2080_rcw.cfg to adapt to new rcw_66_15 for
t2080qds and t2080rdb.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Heiko Schocher [Wed, 28 May 2014 09:33:34 +0000 (11:33 +0200)]
mpc8313, signed fit: enable legacy image format on ids8313 board
Enable legacy image format with CONFIG_IMAGE_FORMAT_LEGACY
on the ids8313 board, as it uses signed FIT images for booting
Linux and need the legacy image format.
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Michael Conrad <Michael.Conrad@ids.de> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Heiko Schocher [Wed, 28 May 2014 09:33:33 +0000 (11:33 +0200)]
bootm: make use of legacy image format configurable
make the use of legacy image format configurable through
the config define CONFIG_IMAGE_FORMAT_LEGACY.
When relying on signed FIT images with required signature check
the legacy image format should be disabled. Therefore introduce
this new define and enable legacy image format if CONFIG_FIT_SIGNATURE
is not set. If CONFIG_FIT_SIGNATURE is set disable per default
the legacy image format.
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Lars Steubesand <lars.steubesand@philips.com> Cc: Mike Pearce <mike@kaew.be> Cc: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
Jon Loeliger [Tue, 27 May 2014 14:12:48 +0000 (09:12 -0500)]
FDT: Fix DTC repository references
The Device Tree Compiler (DTC) used to have its master
repository located on jdl.com. While it is still there,
its official, new, shiny location is on kernel.org here:
git://git.kernel.org/pub/scm/utils/dtc/dtc.git
Update a few references to point there instead.
Signed-off-by: Jon Loeliger <jdl@jdl.com> Acked-by: Simon Glass <sjg@chromium.org>
fat: Define MAX_CLUSTSIZE using CONFIG_FS_FAT_MAX_CLUSTSIZE
Define the MAX_CLUSTSIZE to default of 65536 only if
CONFIG_FS_FAT_MAX_CLUSTSIZE is not defined.
This option has been provided to save memory in some
memory constrained cases.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Michal Simek <monstr@monstr.eu>
Franck Jullien [Wed, 21 May 2014 20:43:50 +0000 (22:43 +0200)]
openrisc: fix relocation code
The relocation code can now relocate from anywhere to
the RAM.
The old code assumed that the binary was copied to the RAM
by some PBL and then it just relocated the .text section
from the loaded address to the linked address.
Now, it first checks if vectors are somewhere else than the
linked address. If yes, there are copied to address 0 (or
to the exception vector base address if register EVBAR is
present).
Then, the .text section is relocated from its current location
to the RAM.
Franck Jullien [Wed, 21 May 2014 20:43:49 +0000 (22:43 +0200)]
openrisc: update SPR registers definition
The OpenRISC architecture specification v1.0 defines
new SPR registers. This patch adds registers definition
for group 0 and update bit definitions for the CPU
configuration register.
phy: fix create_phy_by_mask for when its given an actual search mask
get_phy_id returns -EIO when it can't read from a phy at a given addr. This would cause
create_phy_by_mask to return prematurely before it had tested the other addresses in the provided mask.
Example usage:
Replace
phydev = phy_connect(bus, phy_addr, dev, phy_if)
with
phydev = phy_find_by_mask(bus, phy_mask, phy_if)
if (phydev)
phy_connect_dev(phydev, dev);
Signed-off-by: Cormier, Jonathan <jcormier@criticallink.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
Simon Glass [Fri, 30 May 2014 20:41:50 +0000 (14:41 -0600)]
Fix hush to give the correct return code for a simple command
When a simple command like 'false' is provided, hush should return the
result of that command. However, hush only does this if the
FLAG_EXIT_FROM_LOOP flag is provided. Without this flag, hush will
happily execute the empty string command immediate after 'false' and
then return a success code.
This behaviour does not seem very useful, and requiring the flag also
seems wrong, since it means that hush will execute only the first command
in a sequence.
Add a check for empty string and fall out of the loop in that case. That
at least fixes the simple command case. This is a change in behaviour but
it is unlikely that the old behaviour would be considered correct in any
case.
Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 30 May 2014 20:41:48 +0000 (14:41 -0600)]
Add final result tests for run_command_list()
run_command_list() is supposed to return a return code of 0 for success
and 1 for failure. Add a few simple tests that confirm this. These tests
work both with the built-in parser and hush.
Stephen Warren [Thu, 29 May 2014 21:29:40 +0000 (15:29 -0600)]
ARM: tegra: enable USB device mode and UMS on some boards
For each of Jetson TK1, Venice2, and Beaver:
- Enable the first USB controller in DT, and describe its configuration.
- Enable USB device/gadget support. This allows the user to type e.g.
"ums 0 mmc 0" at the command-line to cause U-Boot to act a USB device
implementing the USB Mass Storage protocol, and expose MMC device 0
that way.
This allows a host PC to mount the Tegra device's MMC, partition it, and
install a filesystem on it.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Thu, 29 May 2014 20:53:03 +0000 (14:53 -0600)]
usb: ci_udc: complete ep0 direction handling
handle_setup() currently assumes that the response to a Setup transaction
will be an OUT transaction, and any subsequent packet (if any) will be an
IN transaction. This appears to be valid in many cases; both USB
enumeration and Mass Storage work OK with this restriction. However, DFU
uses ep0 to transfer data in both directions. This renders the assumption
invalid; when sending data from device to host, the Data Stage is an IN
transaction, and the Status Stage is an OUT transaction. Enhance
handle_setup() to deduce the correct direction for the USB transactions
based on Setup transaction data.
ep0's request object only needs to be automatically re-queued when the
Data Stage completes, in order to implement the Status Stage. Once the
Status Stage transaction is complete, there is no need to re-queue the
USB request, so don't do that.
Don't sent USB request completion callbacks for Status Stage transactions.
These were queued by ci_udc itself, and only serve to confuse the USB
function code. For example, f_dfu attempts to interpret the 0-length data
buffers for Status Stage transactions as DFU packets. These buffers
contain stale data from the previous transaction. This causes f_dfu to
complain about a sequence number mismatch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 29 May 2014 20:53:02 +0000 (14:53 -0600)]
usb: ci_udc: pre-allocate ep0 req
Allocate ep0's USB request object when the UDC driver is probed. This
solves a couple of issues in the current code:
a) A request object always exists for ep0. Prior to this patch, if setup
transactions arrived in an unexpected order, handle_setup() would need
to reply to a setup transaction before any ep0 usb_req was created.
This issue was introduced in commit 2813006fecda "usb: ci_udc: allow
multiple buffer allocs per ep."
b) handle_ep_complete no longer /has/ to queue the ep0 request again
after every single request completion. This is currently required, since
handle_setup() assumes it can find some request object in ep0's request
queue. This patch doesn't actually stop handle_ep_complete() from always
requeueing the request, but the next patch will.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 29 May 2014 20:53:01 +0000 (14:53 -0600)]
usb: ci_udc: use a single descriptor for ep0
ci_udc currently points ep->desc at separate descriptors for IN and OUT.
These descriptors only differ in the ep address IN/OUT field. Modify the
code to use a single descriptor, and change that descriptor's ep address
to indicate IN/OUT as required. This removes some data duplication.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 29 May 2014 20:53:00 +0000 (14:53 -0600)]
usb: ci_udc: detect queued requests on ep0
The flipping of ep0 between IN and OUT relies on ci_ep_queue() consuming
the current IN/OUT setting immediately. If this is deferred to a later
point when the req is pulled out of ci_req->queue, then the IN/OUT
setting may have been changed since the req was queued, and state will
get out of sync. This condition doesn't occur today, but could if bugs
were introduced later, and this error-check will save a lot of debugging
time.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Now that we wait the correct specification-mandated time at the end of
usb_hub_power_on(), I suspect that CONFIG_USB_HUB_MIN_POWER_ON_DELAY has
no purpose.
For cm_t35.h, we already wait longer than the original MIN_POWER_ON_DELAY,
so this change is safe.
For gw_ventana.h, we will wait as long as the original MIN_POWER_ON_DELAY
iff pgood_delay was at least 200ms. I'm not sure if this is the case or
not, hence I've CC'd relevant people to test this change.
Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 19 May 2014 20:21:17 +0000 (14:21 -0600)]
usb: hub: fix power good delay timing
usb_hub_power_on() currently waits for the maximum of (a) the hub port's
power output to become good, (b) the max time the USB specification
allows a device to take to connect.
However, these two operations must occur in series rather than in
parallel. First, the power supply ramps up to the level required to
power the USB device, and then the device may take a certain amount of
time to connect (assert D+/D- pullups).
Related, the maximum time that a device has to assert pullups is 1s not
100ms.
This is explained in "Connect Timing ECN.pdf", itself part of
usb_20_042814.zip from www.usb.org.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Lukasz Majewski [Mon, 12 May 2014 08:43:36 +0000 (10:43 +0200)]
dfu: Introduction of the "dfu_hash_algo" env variable for checksum method setting
Up till now the CRC32 of received data was calculated unconditionally.
The standard crc32 implementation causes long delay when large images
were uploaded.
The "dfu_hash_algo" environment variable gives the opportunity to
disable on demand the hash (crc32) calculation.
It can be done without the need to recompile the u-boot binary.
By default the crc32 is calculated, which means that legacy behavior
has been preserved.
Doug Anderson [Thu, 29 May 2014 16:10:54 +0000 (21:40 +0530)]
Exynos: Make sure ps_hold gets set in the SPL
Setting ps_hold ought to be one of the first things we do when we
first boot up. If we wait until the main u-boot runs we won't set it
in time and the PMIC may power us back off.
Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Fri, 11 Apr 2014 02:01:35 +0000 (20:01 -0600)]
main: Make the execution path a little clearer in main.c
bootdelay_process() never returns in some circumstances, whichs makes the
control flow confusing. Change it so that the decision about how to execute
the boot command is made in the main_loop() code, so it is easier to follow.
Move CLI stuff to cli.c.
Simon Glass [Fri, 11 Apr 2014 02:01:32 +0000 (20:01 -0600)]
m68k: powerpc: Clean up do_mdm_init
This code seems unnecessarily complex. We really just need to check the
global_data. Now that is it all in one place, and not arch-specific, this
is pretty easy.